X-Git-Url: https://codewiz.org/gitweb?a=blobdiff_plain;f=bertos%2Fcpu%2Fcortex-m3%2Fdrv%2Fser_lm3s.c;h=12590b893acf7daf2ce1e6a75c4252f2d2c9751d;hb=911d2706a86d326786bfe721dcc3d63aeade7f28;hp=d24094dd0f0af0af3f9cb118566008a04ed72b98;hpb=341eb0f84a2592c0674ac67f2418b1db27e8d3ac;p=bertos.git

diff --git a/bertos/cpu/cortex-m3/drv/ser_lm3s.c b/bertos/cpu/cortex-m3/drv/ser_lm3s.c
index d24094dd..12590b89 100644
--- a/bertos/cpu/cortex-m3/drv/ser_lm3s.c
+++ b/bertos/cpu/cortex-m3/drv/ser_lm3s.c
@@ -36,7 +36,6 @@
  */
 
 #include <cfg/macros.h> /* for BV() */
-#include <drv/clock_lm3s.h> /* lm3s_busyWait() */
 #include <drv/gpio_lm3s.h>
 #include <drv/ser_p.h>
 #include <drv/ser.h>
@@ -58,11 +57,39 @@ struct CM3Serial
 /* Forward declaration */
 static struct CM3Serial UARTDesc[SER_CNT];
 
-/* Clear the flags register */
-INLINE void lm3s_uartClear(uint32_t base)
+/* GPIO descriptor for UART pins */
+struct gpio_uart_info
 {
-	HWREG(base + UART_O_FR) = 0;
-}
+	/* Sysctl */
+	uint32_t sysctl;
+	/* GPIO base address register */
+	uint32_t base;
+	/* Pin(s) bitmask */
+	uint8_t pins;
+};
+
+/* Table to retrieve GPIO pins configuration to work as UART pins */
+static const struct gpio_uart_info gpio_uart[SER_CNT] =
+{
+	/* UART0 */
+	{
+		.base = GPIO_PORTA_BASE,
+		.pins = BV(1) | BV(0),
+		.sysctl = SYSCTL_RCGC2_GPIOA,
+	},
+	/* UART1 */
+	{
+		.base = GPIO_PORTD_BASE,
+		.pins = BV(3) | BV(2),
+		.sysctl = SYSCTL_RCGC2_GPIOD,
+	},
+	/* UART2 */
+	{
+		.base = GPIO_PORTG_BASE,
+		.pins = BV(1) | BV(0),
+		.sysctl = SYSCTL_RCGC2_GPIOG,
+	},
+};
 
 void lm3s_uartSetBaudRate(uint32_t base, unsigned long baud)
 {
@@ -124,11 +151,11 @@ void lm3s_uartInit(int port)
 
 	/* Enable the peripheral clock */
 	SYSCTL_RCGC1_R |= reg_clock;
-	SYSCTL_RCGC2_R |= SYSCTL_RCGC2_GPIOA;
+	SYSCTL_RCGC2_R |= gpio_uart[port].sysctl;
 	lm3s_busyWait(512);
 
-	/* Set GPIO A0 and A1 as UART pins */
-	lm3s_gpioPinConfig(GPIO_PORTA_BASE, BV(0) | BV(1),
+	/* Configure GPIO pins to work as UART pins */
+	lm3s_gpioPinConfig(gpio_uart[port].base, gpio_uart[port].pins,
 			GPIO_DIR_MODE_HW, GPIO_STRENGTH_2MA, GPIO_PIN_TYPE_STD);
 
 	/* Set serial param: 115.200 bps, no parity */
@@ -165,7 +192,8 @@ static void uart_irq_tx(int port)
 
 	while (lm3s_uartTxReady(base))
 	{
-		if (fifo_isempty(txfifo)) {
+		if (fifo_isempty(txfifo))
+		{
 			/*
 			 * Disable TX empty interrupts if there're no more
 			 * characters to transmit.
@@ -193,8 +221,7 @@ static void uart_common_irq_handler(int port)
 		uart_irq_tx(port);
 }
 
-static void
-lm3s_uartIRQEnable(int port, sysirq_handler_t handler)
+static void lm3s_uartIRQEnable(int port, sysirq_handler_t handler)
 {
 	uint32_t base = UARTDesc[port].base;
 	sysirq_t irq = UARTDesc[port].irq;