X-Git-Url: https://codewiz.org/gitweb?a=blobdiff_plain;f=bertos%2Fcpu%2Fcortex-m3%2Fdrv%2Fser_lm3s.h;h=e58738a8e35b14007c2c64b18346a38ce3a34484;hb=911d2706a86d326786bfe721dcc3d63aeade7f28;hp=27da414b4c6092303dfaadb8df4af54543ce879c;hpb=341eb0f84a2592c0674ac67f2418b1db27e8d3ac;p=bertos.git

diff --git a/bertos/cpu/cortex-m3/drv/ser_lm3s.h b/bertos/cpu/cortex-m3/drv/ser_lm3s.h
index 27da414b..e58738a8 100644
--- a/bertos/cpu/cortex-m3/drv/ser_lm3s.h
+++ b/bertos/cpu/cortex-m3/drv/ser_lm3s.h
@@ -40,6 +40,7 @@
 
 #include <cfg/cfg_debug.h>
 #include <cpu/power.h> /* cpu_relax() */
+#include <drv/clock_lm3s.h> /* lm3s_busyWait() */
 #include <io/lm3s.h>
 
 /* Serial hardware numbers */
@@ -76,6 +77,7 @@ INLINE void lm3s_uartDisable(uint32_t base)
 	/* Disable the UART */
 	HWREG(base + UART_O_CTL) &=
 		~(UART_CTL_UARTEN | UART_CTL_TXE | UART_CTL_RXE);
+	lm3s_busyWait(512);
 }
 
 INLINE void lm3s_uartEnable(uint32_t base)
@@ -86,6 +88,13 @@ INLINE void lm3s_uartEnable(uint32_t base)
 	/* Enable RX, TX, and the UART */
 	HWREG(base + UART_O_CTL) |=
 			UART_CTL_UARTEN | UART_CTL_TXE | UART_CTL_RXE;
+	lm3s_busyWait(512);
+}
+
+/* Clear the flags register */
+INLINE void lm3s_uartClear(uint32_t base)
+{
+	HWREG(base + UART_O_FR) = 0;
 }
 
 INLINE bool lm3s_uartTxDone(uint32_t base)