X-Git-Url: https://codewiz.org/gitweb?a=blobdiff_plain;f=bertos%2Fcpu%2Fcortex-m3%2Finfo%2FLM3S1968.cdef;h=c10c70e07bd4bd676808f074724dbad0035b95ca;hb=9525bb5f7e0bf15bd0b11a21055adf804c6aa478;hp=c3019c43794e952e9fd2b4587b297900c355c246;hpb=5ae31722271d6484af62d3a853dac1e188628861;p=bertos.git

diff --git a/bertos/cpu/cortex-m3/info/LM3S1968.cdef b/bertos/cpu/cortex-m3/info/LM3S1968.cdef
index c3019c43..c10c70e0 100644
--- a/bertos/cpu/cortex-m3/info/LM3S1968.cdef
+++ b/bertos/cpu/cortex-m3/info/LM3S1968.cdef
@@ -44,7 +44,8 @@
 include("cm3.common")
 
 # CPU type used for flashing/debugging
-MK_PROGRAMMER_CPU = "lm3s1968"
+MK_PROGRAMMER_CPU = "lm3s"
+MK_FLASH_SCRIPT = PRG_SCRIPTS_DIR + "arm/flash-lm3s.sh"
 
 # CPU default clock frequency
 CPU_DEFAULT_FREQ = "50000000UL"
@@ -57,8 +58,11 @@ MK_CPU_CSRC += DRV_DIR + "gpio_lm3s.c " + DRV_DIR + "clock_lm3s.c "
 
 # Short description of the cpu.
 CPU_DESC += [ "256 Kbytes on-chip flash memory",
-		"64 Kbytes on-chip SRAM memory" ]
+	      "64 Kbytes on-chip SRAM memory",
+	      "3 UARTs interfaces",
+	      "2 I2C interfaces",
+	      "2 ADC x8 channel 10-bit" ]
 
 # GCC flags for this cpu.
 MK_CPU_CPPFLAGS += " -D__ARM_LM3S1968__"
-MK_CPU_LDFLAGS += " -T " + SCRIPT_DIR + "lm3s1968_rom.ld"
+MK_CPU_LDFLAGS += " -Wl,-dT " + SCRIPT_DIR + "lm3s1968_rom.ld"