X-Git-Url: https://codewiz.org/gitweb?a=blobdiff_plain;f=bertos%2Fcpu%2Fcortex-m3%2Fio%2Fsam3_dacc.h;h=27fcc56e2dd4ce36921e02c31bec2d41de72c7b6;hb=577a9116e32fac33614a21b15d8d1443c3ac420b;hp=7192a33de74a9be12e7ac6c34c6f4c3ede12028f;hpb=8632b1371fab6bd5fda2822620b51c4ff5483004;p=bertos.git

diff --git a/bertos/cpu/cortex-m3/io/sam3_dacc.h b/bertos/cpu/cortex-m3/io/sam3_dacc.h
index 7192a33d..27fcc56e 100644
--- a/bertos/cpu/cortex-m3/io/sam3_dacc.h
+++ b/bertos/cpu/cortex-m3/io/sam3_dacc.h
@@ -173,40 +173,40 @@
  */
 #define DACC_RPR_OFF                     0x100 ///< Receive Pointer Register.
 #define DACC_RPR        (*((reg32_t*) (DACC_BASE + DACC_RPR_OFF)))    ///< Receive Pointer Register.
-
+
 #define DACC_RCR_OFF                     0x104 ///< Receive Counter Register.
 #define DACC_RCR       (*((reg32_t*) (DACC_BASE + DACC_RCR_OFF)))   ///<  Receive Counter Register.
-
+
 #define DACC_TPR_OFF                     0x108 ///< Transmit Pointer Register.
 #define DACC_TPR       (*((reg32_t*) (DACC_BASE + DACC_TPR_OFF)))   ///<  Transmit Pointer Register.
-
+
 #define DACC_TCR_OFF                     0x10C ///< Transmit Counter Register.
 #define DACC_TCR       (*((reg32_t*) (DACC_BASE + DACC_TCR_OFF)))   ///< Transmit Counter Register.
-
+
 #define DACC_RNPR_OFF                    0x110 ///< Receive Next Pointer Register.
 #define DACC_RNPR      (*((reg32_t*) (DACC_BASE + DACC_RNPR_OFF)))   ///< Receive Next Pointer Register.
-
+
 #define DACC_RNCR_OFF                    0x114 ///< Receive Next Counter Register.
 #define DACC_RNCR      (*((reg32_t*) (DACC_BASE + DACC_RNCR_OFF)))   ///< Receive Next Counter Register.
-
+
 #define DACC_TNPR_OFF                    0x118 ///< Transmit Next Pointer Register.
 #define DACC_TNPR      (*((reg32_t*) (DACC_BASE + DACC_TNPR_OFF)))   ///< Transmit Next Pointer Register.
-
+
 #define DACC_TNCR_OFF                    0x11C ///< Transmit Next Counter Register.
 #define DACC_TNCR      (*((reg32_t*) (DACC_BASE + DACC_TNCR_OFF)))   ///< Transmit Next Counter Register.
-
+
 #define DACC_PTCR_OFF                    0x120 ///< Transfer Control Register.
 #define DACC_PTCR      (*((reg32_t*) (DACC_BASE + DACC_PTCR_OFF)))  ///< Transfer Control Register.
-
+
 #define DACC_PTSR_OFF                    0x124 ///< Transfer Status Register.
 #define DACC_PTSR      (*((reg32_t*) (DACC_BASE + DACC_PTSR_OFF)))    ///< Transfer Status Register.
 
 
-#define DACC_PTCR_RXTEN               0  ///< DACC_PTCR  Receiver Transfer Enable.
-#define DACC_PTCR_RXTDIS              1  ///< DACC_PTCR  Receiver Transfer Disable.
-#define DACC_PTCR_TXTEN               8  ///< DACC_PTCR  Transmitter Transfer Enable.
-#define DACC_PTCR_TXTDIS              9  ///< DACC_PTCR  Transmitter Transfer Disable.
-#define DACC_PTSR_RXTEN               0  ///< DACC_PTSR  Receiver Transfer Enable.
+#define DACC_PTCR_RXTEN               0  ///< DACC_PTCR  Receiver Transfer Enable.
+#define DACC_PTCR_RXTDIS              1  ///< DACC_PTCR  Receiver Transfer Disable.
+#define DACC_PTCR_TXTEN               8  ///< DACC_PTCR  Transmitter Transfer Enable.
+#define DACC_PTCR_TXTDIS              9  ///< DACC_PTCR  Transmitter Transfer Disable.
+#define DACC_PTSR_RXTEN               0  ///< DACC_PTSR  Receiver Transfer Enable.
 #define DACC_PTSR_TXTEN               8  ///< DACC_PTSR  Transmitter Transfer Enable.
 
 #endif /* SAM3_DACC_H */