X-Git-Url: https://codewiz.org/gitweb?a=blobdiff_plain;f=bertos%2Fcpu%2Fcortex-m3%2Fio%2Fstm32_flash.h;h=10c244afa824e6d28d4869b9a83fe93b80804529;hb=3a9f71a83372f6e3d66ad64fd7ad5524940eec70;hp=48896659a699cfe79a6cc1b9a123699574cce550;hpb=5b80871b873f58aaa2d546a33d26ce43a64e114e;p=bertos.git

diff --git a/bertos/cpu/cortex-m3/io/stm32_flash.h b/bertos/cpu/cortex-m3/io/stm32_flash.h
index 48896659..10c244af 100644
--- a/bertos/cpu/cortex-m3/io/stm32_flash.h
+++ b/bertos/cpu/cortex-m3/io/stm32_flash.h
@@ -36,8 +36,14 @@
 #ifndef STM32_FLASH_H
 #define STM32_FLASH_H
 
+#include <cfg/compiler.h>
+
 #include <cpu/types.h>
 
+/** Return the embedded flash size in kB */
+#define F_SIZE                   ((*(reg32_t *) 0x1FFFF7E0) & 0xFFFF)
+
+
 /* Flash Access Control Register bits */
 #define ACR_LATENCY_MASK         ((uint32_t)0x00000038)
 #define ACR_HLFCYA_MASK          ((uint32_t)0xFFFFFFF7)
@@ -149,4 +155,22 @@
 #define FLASH_FLAG_WRPRTERR      ((uint32_t)0x00000010)  /* FLASH Write protected error flag */
 #define FLASH_FLAG_OPTERR        ((uint32_t)0x00000001)  /* FLASH Option Byte error flag */
 
+
+
+/**
+ * Embbeded flash configuration registers structure
+ */
+struct stm32_flash
+{
+  reg32_t ACR;
+  reg32_t KEYR;
+  reg32_t OPTKEYR;
+  reg32_t SR;
+  reg32_t CR;
+  reg32_t AR;
+  reg32_t RESERVED;
+  reg32_t OBR;
+  reg32_t WRPR;
+};
+
 #endif /* STM32_FLASH_H */