X-Git-Url: https://codewiz.org/gitweb?a=blobdiff_plain;f=bertos%2Fcpu%2Fcortex-m3%2Fio%2Fstm32_flash.h;h=10c244afa824e6d28d4869b9a83fe93b80804529;hb=b7165529c0174f9bc5a1f4f51a4e405f202e48d5;hp=ffab456b689c3ae46000ca8cae801f6c6097e6e0;hpb=7b1764366f5de94f0b8a6d8fa92709ce3e6f40b8;p=bertos.git

diff --git a/bertos/cpu/cortex-m3/io/stm32_flash.h b/bertos/cpu/cortex-m3/io/stm32_flash.h
index ffab456b..10c244af 100644
--- a/bertos/cpu/cortex-m3/io/stm32_flash.h
+++ b/bertos/cpu/cortex-m3/io/stm32_flash.h
@@ -36,14 +36,19 @@
 #ifndef STM32_FLASH_H
 #define STM32_FLASH_H
 
+#include <cfg/compiler.h>
+
 #include <cpu/types.h>
 
+/** Return the embedded flash size in kB */
+#define F_SIZE                   ((*(reg32_t *) 0x1FFFF7E0) & 0xFFFF)
+
+
 /* Flash Access Control Register bits */
 #define ACR_LATENCY_MASK         ((uint32_t)0x00000038)
 #define ACR_HLFCYA_MASK          ((uint32_t)0xFFFFFFF7)
 #define ACR_PRFTBE_MASK          ((uint32_t)0xFFFFFFEF)
 
-#ifdef _FLASH_PROG
 /* Flash Access Control Register bits */
 #define ACR_PRFTBS_MASK          ((uint32_t)0x00000020)
 
@@ -132,11 +137,11 @@
 #define OB_IWDG_HW                  ((uint16_t)0x0000)  /* Hardware IWDG selected */
 
 /* Option Bytes nRST_STOP */
-#define OB_STOP_NoRST               ((uint16_t)0x0002) /* No reset generated when entering in STOP */
+#define OB_STOP_NORST               ((uint16_t)0x0002) /* No reset generated when entering in STOP */
 #define OB_STOP_RST                 ((uint16_t)0x0000) /* Reset generated when entering in STOP */
 
 /* Option Bytes nRST_STDBY */
-#define OB_STDBY_NoRST              ((uint16_t)0x0004) /* No reset generated when entering in STANDBY */
+#define OB_STDBY_NORST              ((uint16_t)0x0004) /* No reset generated when entering in STANDBY */
 #define OB_STDBY_RST                ((uint16_t)0x0000) /* Reset generated when entering in STANDBY */
 
 /* FLASH Interrupts */
@@ -150,4 +155,22 @@
 #define FLASH_FLAG_WRPRTERR      ((uint32_t)0x00000010)  /* FLASH Write protected error flag */
 #define FLASH_FLAG_OPTERR        ((uint32_t)0x00000001)  /* FLASH Option Byte error flag */
 
+
+
+/**
+ * Embbeded flash configuration registers structure
+ */
+struct stm32_flash
+{
+  reg32_t ACR;
+  reg32_t KEYR;
+  reg32_t OPTKEYR;
+  reg32_t SR;
+  reg32_t CR;
+  reg32_t AR;
+  reg32_t RESERVED;
+  reg32_t OBR;
+  reg32_t WRPR;
+};
+
 #endif /* STM32_FLASH_H */