X-Git-Url: https://codewiz.org/gitweb?a=blobdiff_plain;f=bertos%2Fcpu%2Fdetect.h;h=19fb80b73c51154e387a1dbcdf1aa517193e109b;hb=73a7e9cb144007905b5b9de8e3086423e79b6d71;hp=c6a48b993b37ddd7152c6ca748673041656b9fe3;hpb=f6ea622f4d360194bbd4d0953f18271cbcfcd69e;p=bertos.git diff --git a/bertos/cpu/detect.h b/bertos/cpu/detect.h index c6a48b99..19fb80b7 100644 --- a/bertos/cpu/detect.h +++ b/bertos/cpu/detect.h @@ -51,6 +51,7 @@ #if defined(__ARM_AT91SAM7S64__) #define CPU_ARM_AT91 1 + #define CPU_ARM_SAM7S_LARGE 1 #define CPU_ARM_AT91SAM7S64 1 #else #define CPU_ARM_AT91SAM7S64 0 @@ -58,6 +59,7 @@ #if defined(__ARM_AT91SAM7S128__) #define CPU_ARM_AT91 1 + #define CPU_ARM_SAM7S_LARGE 1 #define CPU_ARM_AT91SAM7S128 1 #else #define CPU_ARM_AT91SAM7S128 0 @@ -65,14 +67,24 @@ #if defined(__ARM_AT91SAM7S256__) #define CPU_ARM_AT91 1 + #define CPU_ARM_SAM7S_LARGE 1 #define CPU_ARM_AT91SAM7S256 1 #else #define CPU_ARM_AT91SAM7S256 0 #endif + #if defined(__ARM_AT91SAM7S512__) + #define CPU_ARM_AT91 1 + #define CPU_ARM_SAM7S_LARGE 1 + #define CPU_ARM_AT91SAM7S512 1 + #else + #define CPU_ARM_AT91SAM7S512 0 + #endif + // AT91SAM7X core family #if defined(__ARM_AT91SAM7X128__) #define CPU_ARM_AT91 1 + #define CPU_ARM_SAM7X 1 #define CPU_ARM_AT91SAM7X128 1 #else #define CPU_ARM_AT91SAM7X128 0 @@ -80,11 +92,21 @@ #if defined(__ARM_AT91SAM7X256__) #define CPU_ARM_AT91 1 + #define CPU_ARM_SAM7X 1 #define CPU_ARM_AT91SAM7X256 1 #else #define CPU_ARM_AT91SAM7X256 0 #endif + + #if defined(__ARM_AT91SAM7X512__) + #define CPU_ARM_AT91 1 + #define CPU_ARM_SAM7X 1 + #define CPU_ARM_AT91SAM7X512 1 + #else + #define CPU_ARM_AT91SAM7X512 0 + #endif + #if defined (__ARM_LM3S1968__) #define CPU_ARM_LM3S 1 #define CPU_ARM_LM3S1968 1 @@ -92,29 +114,56 @@ #define CPU_ARM_LM3S1968 0 #endif + #if defined(__ARM_LPC2378__) + #define CPU_ARM_LPC2 1 + #define CPU_ARM_LPC2378 1 + #else + #define CPU_ARM_LPC2378 0 + #endif + + #if !defined(CPU_ARM_SAM7S_LARGE) + #define CPU_ARM_SAM7S_LARGE 0 + #endif + + #if !defined(CPU_ARM_SAM7X) + #define CPU_ARM_SAM7X 0 + #endif #if defined(CPU_ARM_AT91) #if CPU_ARM_AT91SAM7S32 + CPU_ARM_AT91SAM7S64 \ + CPU_ARM_AT91SAM7S128 + CPU_ARM_AT91SAM7S256 \ - + CPU_ARM_AT91SAM7X128 + CPU_ARM_AT91SAM7X256 != 1 + + CPU_ARM_AT91SAM7S512 \ + + CPU_ARM_AT91SAM7X128 + CPU_ARM_AT91SAM7X256 \ + + CPU_ARM_AT91SAM7X512 != 1 #error ARM CPU configuration error #endif #define CPU_ARM_LM3S 0 + #define CPU_ARM_LPC2 0 #elif defined (CPU_ARM_LM3S) #if CPU_ARM_LM3S1968 + 0 != 1 #error Luminary ARM CPU configuration error #endif #define CPU_ARM_AT91 0 + #define CPU_ARM_LPC2 0 + #elif defined (CPU_ARM_LPC2) + + #if CPU_ARM_LPC2378 + 0 != 1 + #error NXP LPC2xxx ARM CPU configuration error + #endif + #define CPU_ARM_AT91 0 + #define CPU_ARM_LM3S 0 /* #elif Add other ARM families here */ #else #define CPU_ARM_AT91 0 #define CPU_ARM_LM3S 0 + #define CPU_ARM_LPC2 0 #endif - #if CPU_ARM_AT91 + CPU_ARM_LM3S + 0 /* Add other ARM families here */ != 1 + #if CPU_ARM_AT91 + CPU_ARM_LM3S \ + + CPU_ARM_LPC2 + 0 /* Add other ARM families here */ != 1 #error ARM CPU configuration error #endif #else @@ -123,16 +172,25 @@ /* ARM Families */ #define CPU_ARM_AT91 0 #define CPU_ARM_LM3S 0 + #define CPU_ARM_LPC2 0 + + /* SAM7 sub-families */ + #define CPU_ARM_SAM7S_LARGE 0 + #define CPU_ARM_SAM7X 0 /* ARM CPUs */ #define CPU_ARM_AT91SAM7S32 0 #define CPU_ARM_AT91SAM7S64 0 #define CPU_ARM_AT91SAM7S128 0 #define CPU_ARM_AT91SAM7S256 0 + #define CPU_ARM_AT91SAM7S512 0 #define CPU_ARM_AT91SAM7X128 0 #define CPU_ARM_AT91SAM7X256 0 + #define CPU_ARM_AT91SAM7X512 0 #define CPU_ARM_LM3S1968 0 + + #define CPU_ARM_LPC2378 0 #endif #if (defined(__IAR_SYSTEMS_ICC__) || defined(__IAR_SYSTEMS_ICC)) \ @@ -228,6 +286,12 @@ #define CPU_AVR_ATMEGA168 0 #endif + #if defined(__AVR_ATmega328P__) + #define CPU_AVR_ATMEGA328P 1 + #else + #define CPU_AVR_ATMEGA328P 0 + #endif + #if defined(__AVR_ATmega1281__) #define CPU_AVR_ATMEGA1281 1 #else @@ -235,13 +299,14 @@ #endif #if CPU_AVR_ATMEGA32 + CPU_AVR_ATMEGA64 + CPU_AVR_ATMEGA103 + CPU_AVR_ATMEGA128 \ - + CPU_AVR_ATMEGA8 + CPU_AVR_ATMEGA168 + CPU_AVR_ATMEGA1281 != 1 + + CPU_AVR_ATMEGA8 + CPU_AVR_ATMEGA168 + CPU_AVR_ATMEGA328P + CPU_AVR_ATMEGA1281 != 1 #error AVR CPU configuration error #endif #else #define CPU_AVR 0 #define CPU_AVR_ATMEGA8 0 #define CPU_AVR_ATMEGA168 0 + #define CPU_AVR_ATMEGA328P 0 #define CPU_AVR_ATMEGA32 0 #define CPU_AVR_ATMEGA64 0 #define CPU_AVR_ATMEGA103 0