X-Git-Url: https://codewiz.org/gitweb?a=blobdiff_plain;f=bertos%2Fcpu%2Fdetect.h;h=7b57ae70fa65b45a16dd1bb19f83200f5e83e8dc;hb=a3ffb42b8a665abcbc54d8cfd290c368ab5f083c;hp=1232ad69503baef77d2b20871434bf07861d00ee;hpb=4d723e99d435f2bdff45611e7d48c0f8f2cd1f84;p=bertos.git diff --git a/bertos/cpu/detect.h b/bertos/cpu/detect.h index 1232ad69..7b57ae70 100644 --- a/bertos/cpu/detect.h +++ b/bertos/cpu/detect.h @@ -40,7 +40,7 @@ || defined(__ARM4TM__) /* IAR: defined for all cores >= 4tm */ #define CPU_ARM 1 #define CPU_ID arm - #define CPU_CORE_NAME "ARM" + #define CPU_CORE_NAME "ARM7TDMI" // AT91SAM7S core family #if defined(__ARM_AT91SAM7S32__) @@ -213,13 +213,42 @@ #define CPU_CM3_STM32F103RB 0 #endif - #if defined (__ARM_AT91SAM3N4__) - #define CPU_CM3_AT91SAM3 1 - #define CPU_CM3_AT91SAM3N 1 - #define CPU_CM3_AT91SAM3N4 1 - #define CPU_NAME "AT91SAM3N4" + #if defined (__ARM_SAM3N4__) + #define CPU_CM3_SAM3 1 + #define CPU_CM3_SAM3N 1 + #define CPU_CM3_SAM3N4 1 + #define CPU_NAME "SAM3N4" + + #define CPU_CM3_SAM3S 0 + #define CPU_CM3_SAM3U 0 + #define CPU_CM3_SAM3N2 0 + #define CPU_CM3_SAM3N1 0 + #else + #define CPU_CM3_SAM3N4 0 + #endif + + #if defined (__ARM_SAM3S4__) + #define CPU_CM3_SAM3 1 + #define CPU_CM3_SAM3S 1 + #define CPU_CM3_SAM3S4 1 + #define CPU_NAME "SAM3S4" + + #define CPU_CM3_SAM3N 0 + #define CPU_CM3_SAM3U 0 + #else + #define CPU_CM3_SAM3S4 0 + #endif + + #if defined (__ARM_SAM3U4__) + #define CPU_CM3_SAM3 1 + #define CPU_CM3_SAM3U 1 + #define CPU_CM3_SAM3U4 1 + #define CPU_NAME "SAM3U4" + + #define CPU_CM3_SAM3N 0 + #define CPU_CM3_SAM3S 0 #else - #define CPU_CM3_AT91SAM3N4 0 + #define CPU_CM3_SAM3U4 0 #endif #if defined (CPU_CM3_LM3S) @@ -227,19 +256,19 @@ #error Luminary Cortex-M3 CPU configuration error #endif #define CPU_CM3_STM32 0 - #define CPU_CM3_AT91SAM3 0 + #define CPU_CM3_SAM3 0 #elif defined (CPU_CM3_STM32) #if CPU_CM3_STM32F103RB + 0 != 1 #error STM32 Cortex-M3 CPU configuration error #endif #define CPU_CM3_LM3S 0 - #define CPU_CM3_AT91SAM3 0 - #elif defined (CPU_CM3_AT91SAM3) - #if CPU_CM3_AT91SAM3N + 0 != 1 - #error AT91SAM3 Cortex-M3 CPU configuration error + #define CPU_CM3_SAM3 0 + #elif defined (CPU_CM3_SAM3) + #if CPU_CM3_SAM3N + 0 != 1 + #error SAM3 Cortex-M3 CPU configuration error #endif - #if CPU_CM3_AT91SAM3N4 + 0 != 1 - #error AT91SAM3 Cortex-M3 CPU configuration error + #if CPU_CM3_SAM3N4 + CPU_CM3_SAM3S4 + CPU_CM3_SAM3U4 + 0 != 1 + #error SAM3 Cortex-M3 CPU configuration error #endif #define CPU_CM3_LM3S 0 #define CPU_CM3_STM32 0 @@ -247,11 +276,11 @@ #else #define CPU_CM3_LM3S 0 #define CPU_CM3_STM32 0 - #define CPU_CM3_AT91SAM3 0 + #define CPU_CM3_SAM3 0 #endif - #if CPU_CM3_LM3S + CPU_CM3_STM32 + CPU_CM3_AT91SAM3 + 0 /* Add other Cortex-M3 families here */ != 1 + #if CPU_CM3_LM3S + CPU_CM3_STM32 + CPU_CM3_SAM3 + 0 /* Add other Cortex-M3 families here */ != 1 #error Cortex-M3 CPU configuration error #endif @@ -264,9 +293,9 @@ #define CPU_CM3_STM32 0 #define CPU_CM3_STM32F103RB 0 - #define CPU_CM3_AT91SAM3 0 - #define CPU_CM3_AT91SAM3N 0 - #define CPU_CM3_AT91SAM3N4 0 + #define CPU_CM3_SAM3 0 + #define CPU_CM3_SAM3N 0 + #define CPU_CM3_SAM3N4 0 #endif #if (defined(__IAR_SYSTEMS_ICC__) || defined(__IAR_SYSTEMS_ICC)) \ @@ -417,14 +446,27 @@ #define CPU_ID msp430 #define CPU_CORE_NAME "MSP430" - #if defined(__MSP430_2274__) - #define CPU_MSP430_2274 1 - #define CPU_NAME "2274" + #if defined(__MSP430F2274__) + #define CPU_MSP430F2274 1 + #define CPU_NAME "MSP430F2274" #else - #define CPU_MSP430_2274 0 + #define CPU_MSP430F2274 0 + #endif + + #if defined(__MSP430G2231__) + #define CPU_MSP430G2231 1 + #define CPU_NAME "MSP430G2231" + #else + #define CPU_MSP430G2231 0 + #endif + + #if CPU_MSP430F2274 + CPU_MSP430G2231 != 1 + #error MSP430 CPU configuration error #endif #else - #define CPU_MSP430 0 + #define CPU_MSP430 0 + #define CPU_MSP430F2274 0 + #define CPU_MSP430G2231 0 #endif