X-Git-Url: https://codewiz.org/gitweb?a=blobdiff_plain;f=bertos%2Fcpu%2Fdetect.h;h=d096e3d7abc3ae408e5f4d5b308ced84cc248359;hb=493d98f6f007571506feb2d6b4250b63e2edc7e1;hp=33f6178cffa4efbc1d269f175ed21bfa646daa5e;hpb=b7daab00fae8117ef4d1f63848874c1bedc68c01;p=bertos.git diff --git a/bertos/cpu/detect.h b/bertos/cpu/detect.h index 33f6178c..d096e3d7 100644 --- a/bertos/cpu/detect.h +++ b/bertos/cpu/detect.h @@ -199,39 +199,59 @@ #define CPU_CM3_STM32F103RB 0 #endif + #if defined (__ARM_AT91SAM3N4__) + #define CPU_CM3_AT91SAM3 1 + #define CPU_CM3_AT91SAM3N 1 + #define CPU_CM3_AT91SAM3N4 1 + #else + #define CPU_CM3_AT91SAM3N4 0 + #endif + #if defined (CPU_CM3_LM3S) #if CPU_CM3_LM3S1968 + CPU_CM3_LM3S8962 + 0 != 1 #error Luminary Cortex-M3 CPU configuration error #endif #define CPU_CM3_STM32 0 + #define CPU_CM3_AT91SAM3 0 #elif defined (CPU_CM3_STM32) #if CPU_CM3_STM32F103RB + 0 != 1 #error STM32 Cortex-M3 CPU configuration error #endif #define CPU_CM3_LM3S 0 + #define CPU_CM3_AT91SAM3 0 + #elif defined (CPU_CM3_AT91SAM3) + #if CPU_CM3_AT91SAM3N + 0 != 1 + #error AT91SAM3 Cortex-M3 CPU configuration error + #endif + #if CPU_CM3_AT91SAM3N4 + 0 != 1 + #error AT91SAM3 Cortex-M3 CPU configuration error + #endif + #define CPU_CM3_LM3S 0 + #define CPU_CM3_STM32 0 /* #elif Add other Cortex-M3 families here */ #else #define CPU_CM3_LM3S 0 #define CPU_CM3_STM32 0 + #define CPU_CM3_AT91SAM3 0 #endif - #if CPU_CM3_LM3S + CPU_CM3_STM32 + 0 /* Add other Cortex-M3 families here */ != 1 + #if CPU_CM3_LM3S + CPU_CM3_STM32 + CPU_CM3_AT91SAM3 + 0 /* Add other Cortex-M3 families here */ != 1 #error Cortex-M3 CPU configuration error #endif #else #define CPU_CM3 0 - #define CPU_CM3_LM3S 0 - #define CPU_CM3_LM3S1968 0 - #define CPU_CM3_LM3S8968 0 #define CPU_CM3_STM32 0 - #define CPU_CM3_STM32F103RB 0 + + #define CPU_CM3_AT91SAM3 0 + #define CPU_CM3_AT91SAM3N 0 + #define CPU_CM3_AT91SAM3N4 0 #endif #if (defined(__IAR_SYSTEMS_ICC__) || defined(__IAR_SYSTEMS_ICC)) \ @@ -339,8 +359,15 @@ #define CPU_AVR_ATMEGA1281 0 #endif + #if defined(__AVR_ATmega1280__) + #define CPU_AVR_ATMEGA1280 1 + #else + #define CPU_AVR_ATMEGA1280 0 + #endif + #if CPU_AVR_ATMEGA32 + CPU_AVR_ATMEGA64 + CPU_AVR_ATMEGA103 + CPU_AVR_ATMEGA128 \ - + CPU_AVR_ATMEGA8 + CPU_AVR_ATMEGA168 + CPU_AVR_ATMEGA328P + CPU_AVR_ATMEGA1281 != 1 + + CPU_AVR_ATMEGA8 + CPU_AVR_ATMEGA168 + CPU_AVR_ATMEGA328P + CPU_AVR_ATMEGA1281 \ + + CPU_AVR_ATMEGA1280 != 1 #error AVR CPU configuration error #endif #else @@ -353,15 +380,29 @@ #define CPU_AVR_ATMEGA103 0 #define CPU_AVR_ATMEGA128 0 #define CPU_AVR_ATMEGA1281 0 + #define CPU_AVR_ATMEGA1280 0 +#endif + +#if defined (__MSP430__) + #define CPU_MSP430 1 + #define CPU_ID msp430 + + #if defined(__MSP430_2274__) + #define CPU_MSP430_2274 1 + #else + #define CPU_MSP430_2274 0 + #endif +#else + #define CPU_MSP430 0 #endif /* Self-check for the detection: only one CPU must be detected */ -#if CPU_ARM + CPU_CM3 + CPU_I196 + CPU_X86 + CPU_PPC + CPU_DSP56K + CPU_AVR == 0 +#if CPU_ARM + CPU_CM3 + CPU_I196 + CPU_X86 + CPU_PPC + CPU_DSP56K + CPU_AVR + CPU_MSP430 == 0 #error Unknown CPU #elif !defined(CPU_ID) #error CPU_ID not defined -#elif CPU_ARM + CPU_CM3 + CPU_I196 + CPU_X86 + CPU_PPC + CPU_DSP56K + CPU_AVR != 1 +#elif CPU_ARM + CPU_CM3 + CPU_I196 + CPU_X86 + CPU_PPC + CPU_DSP56K + CPU_AVR + CPU_MSP430 != 1 #error Internal CPU configuration error #endif