X-Git-Url: https://codewiz.org/gitweb?a=blobdiff_plain;f=bertos%2Fcpu%2Fframe.h;h=2244b3b1bf85a243ca1d1f407a365fd1bc99cf24;hb=f709a37e5659fd591b5a61d80b45257105ac1850;hp=a17c8efa72ce17c0b7c84cc3bb778847b13b3e71;hpb=2ce39c1d757d9214774af12185522c72727bcdf4;p=bertos.git diff --git a/bertos/cpu/frame.h b/bertos/cpu/frame.h index a17c8efa..2244b3b1 100644 --- a/bertos/cpu/frame.h +++ b/bertos/cpu/frame.h @@ -58,29 +58,49 @@ #elif CPU_ARM - #define CPU_SAVED_REGS_CNT 9 + #define CPU_SAVED_REGS_CNT 10 #define CPU_STACK_GROWS_UPWARD 0 #define CPU_SP_ON_EMPTY_SLOT 0 /** * Initialization value for registers in stack frame. - * The register index is not directly corrispondent to CPU - * register numbers, but is related to how are pushed to - * stack (\see asm_switch_context). - * Index (CPU_SAVED_REGS_CNT - 1) is the CPSR register, - * the initial value is set to: + * For the CPSR register, the initial value is set to: * - All flags (N, Z, C, V) set to 0. * - IRQ and FIQ enabled. * - ARM state. * - CPU in Supervisor Mode (SVC). */ - #define CPU_REG_INIT_VALUE(reg) (reg == (CPU_SAVED_REGS_CNT - 1) ? 0x13 : 0) + #define CPU_CREATE_NEW_STACK(stack, entry, exit) \ + do { \ + /* Process entry point */ \ + CPU_PUSH_CALL_FRAME(stack, entry); \ + /* LR (proc_exit) */ \ + CPU_PUSH_CALL_FRAME(stack, exit); \ + /* R11 */ \ + CPU_PUSH_WORD(stack, 0x11111111); \ + /* R10 */ \ + CPU_PUSH_WORD(stack, 0x10101010); \ + /* R9 */ \ + CPU_PUSH_WORD(stack, 0x09090909); \ + /* R8 */ \ + CPU_PUSH_WORD(stack, 0x08080808); \ + /* R7 */ \ + CPU_PUSH_WORD(stack, 0x07070707); \ + /* R6 */ \ + CPU_PUSH_WORD(stack, 0x06060606); \ + /* R5 */ \ + CPU_PUSH_WORD(stack, 0x05050505); \ + /* R4 */ \ + CPU_PUSH_WORD(stack, 0x04040404); \ + /* CPSR */ \ + CPU_PUSH_WORD(stack, 0x00000013); \ + } while (0) #elif CPU_PPC #define CPU_SAVED_REGS_CNT 1 #define CPU_STACK_GROWS_UPWARD 0 - #define CPU_SP_ON_EMPTY_SLOT 0 + #define CPU_SP_ON_EMPTY_SLOT 1 #elif CPU_DSP56K @@ -145,7 +165,7 @@ #if !CPU_SP_ON_EMPTY_SLOT /* DSP56K and other weirdos */ #define CPU_PUSH_WORD(sp, data) \ - do { *++(sp) = (cpustack_t)(data); } while (0) + do { *++(sp) = (cpu_stack_t)(data); } while (0) #define CPU_POP_WORD(sp) \ (*(sp)--) #else @@ -160,7 +180,7 @@ * RTS discards SR while returning (it does not restore it). So we push * 0 to fake the same context. */ - #define CPU_PUSH_CALL_FRMAE(sp, func) \ + #define CPU_PUSH_CALL_FRAME(sp, func) \ do { \ CPU_PUSH_WORD((sp), (func)); \ CPU_PUSH_WORD((sp), 0x100); \ @@ -207,13 +227,13 @@ #define CPU_PUSH_CALL_FRAME(sp, func) \ do { \ - CPU_PUSH_WORD((sp), (cpustack_t)(func)); /* LR -> 8(SP) */ \ + CPU_PUSH_WORD((sp), (cpu_stack_t)(func)); /* LR -> 8(SP) */ \ CPU_PUSH_WORD((sp), 0); /* CR -> 4(SP) */ \ } while (0) #else #define CPU_PUSH_CALL_FRAME(sp, func) \ - CPU_PUSH_WORD((sp), (cpustack_t)(func)) + CPU_PUSH_WORD((sp), (cpu_stack_t)(func)) #endif /** @@ -226,7 +246,7 @@ * in hosted environments such as emulators. */ #ifndef CPU_IDLE - #if defined(ARCH_EMUL) && (ARCH & ARCH_EMUL) + #if defined(ARCH_QT) && (ARCH & ARCH_QT) /* This emulator hook should yield the CPU to the host. */ EXTERN_C_BEGIN void emul_idle(void); @@ -237,4 +257,21 @@ #endif /* !ARCH_EMUL */ #endif /* !CPU_IDLE */ +/** + * Default macro for creating a new Process stack + */ +#ifndef CPU_CREATE_NEW_STACK + + #define CPU_CREATE_NEW_STACK(stack, entry, exit) \ + do { \ + size_t i; \ + /* Initialize process stack frame */ \ + CPU_PUSH_CALL_FRAME(stack, exit); \ + CPU_PUSH_CALL_FRAME(stack, entry); \ + /* Push a clean set of CPU registers for asm_switch_context() */ \ + for (i = 0; i < CPU_SAVED_REGS_CNT; i++) \ + CPU_PUSH_WORD(stack, CPU_REG_INIT_VALUE(i)); \ + } while (0) +#endif + #endif /* CPU_ATTR_H */