X-Git-Url: https://codewiz.org/gitweb?a=blobdiff_plain;f=bertos%2Fcpu%2Fframe.h;h=dbb20a1ec67aa6692d504f2fb83b3d9e57024887;hb=32d1445272120a254d77ce8d1af1f527da7a2c17;hp=a17c8efa72ce17c0b7c84cc3bb778847b13b3e71;hpb=2ce39c1d757d9214774af12185522c72727bcdf4;p=bertos.git

diff --git a/bertos/cpu/frame.h b/bertos/cpu/frame.h
index a17c8efa..dbb20a1e 100644
--- a/bertos/cpu/frame.h
+++ b/bertos/cpu/frame.h
@@ -51,36 +51,32 @@
 #include <cfg/compiler.h>      /* for uintXX_t */
 
 #if CPU_X86
+	#if CPU_X86_32
 
-	#define CPU_SAVED_REGS_CNT      7
-	#define CPU_STACK_GROWS_UPWARD  0
-	#define CPU_SP_ON_EMPTY_SLOT	0
+		#define CPU_SAVED_REGS_CNT      4
+		#define CPU_STACK_GROWS_UPWARD  0
+		#define CPU_SP_ON_EMPTY_SLOT	0
+
+	#elif CPU_X86_64
+
+		#define CPU_SAVED_REGS_CNT      8
+		#define CPU_STACK_GROWS_UPWARD  0
+		#define CPU_SP_ON_EMPTY_SLOT	0
+	#else
+		#error "unknown CPU"
+	#endif
 
 #elif CPU_ARM
 
-	#define CPU_SAVED_REGS_CNT     9
+	#define CPU_SAVED_REGS_CNT     8
 	#define CPU_STACK_GROWS_UPWARD 0
 	#define CPU_SP_ON_EMPTY_SLOT   0
 
-	/**
-	 * Initialization value for registers in stack frame.
-	 * The register index is not directly corrispondent to CPU
-	 * register numbers, but is related to how are pushed to
-	 * stack (\see asm_switch_context).
-	 * Index (CPU_SAVED_REGS_CNT - 1) is the CPSR register,
-	 * the initial value is set to:
-	 * - All flags (N, Z, C, V) set to 0.
-	 * - IRQ and FIQ enabled.
-	 * - ARM state.
-	 * - CPU in Supervisor Mode (SVC).
-	 */
-	#define CPU_REG_INIT_VALUE(reg) (reg == (CPU_SAVED_REGS_CNT - 1) ? 0x13 : 0)
-
 #elif CPU_PPC
 
 	#define CPU_SAVED_REGS_CNT     1
 	#define CPU_STACK_GROWS_UPWARD 0
-	#define CPU_SP_ON_EMPTY_SLOT   0
+	#define CPU_SP_ON_EMPTY_SLOT   1
 
 #elif CPU_DSP56K
 
@@ -90,18 +86,10 @@
 
 #elif CPU_AVR
 
-	#define CPU_SAVED_REGS_CNT     19
+	#define CPU_SAVED_REGS_CNT     18
 	#define CPU_STACK_GROWS_UPWARD  0
 	#define CPU_SP_ON_EMPTY_SLOT    1
 
-	/**
-	 * Initialization value for registers in stack frame.
-	 * The register index is not directly corrispondent to CPU
-	 * register numbers. Index 0 is the SREG register: the initial
-	 * value is all 0 but the interrupt bit (bit 7).
-	 */
-	#define CPU_REG_INIT_VALUE(reg) (reg == 0 ? 0x80 : 0)
-
 #else
 	#error No CPU_... defined.
 #endif
@@ -116,7 +104,7 @@
 
 /// Default for macro not defined in the right arch section
 #ifndef CPU_REG_INIT_VALUE
-	#define CPU_REG_INIT_VALUE(reg)     0
+	#define CPU_REG_INIT_VALUE(reg)     (reg)
 #endif
 
 /*
@@ -145,7 +133,7 @@
 	#if !CPU_SP_ON_EMPTY_SLOT
 		/* DSP56K and other weirdos */
 		#define CPU_PUSH_WORD(sp, data) \
-			do { *++(sp) = (cpustack_t)(data); } while (0)
+			do { *++(sp) = (cpu_stack_t)(data); } while (0)
 		#define CPU_POP_WORD(sp) \
 			(*(sp)--)
 	#else
@@ -160,7 +148,7 @@
 	 * RTS discards SR while returning (it does not restore it). So we push
 	 * 0 to fake the same context.
 	 */
-	#define CPU_PUSH_CALL_FRMAE(sp, func) \
+	#define CPU_PUSH_CALL_FRAME(sp, func) \
 		do { \
 			CPU_PUSH_WORD((sp), (func)); \
 			CPU_PUSH_WORD((sp), 0x100); \
@@ -207,13 +195,13 @@
 
 	#define CPU_PUSH_CALL_FRAME(sp, func) \
 		do { \
-			CPU_PUSH_WORD((sp), (cpustack_t)(func)); /* LR -> 8(SP) */ \
+			CPU_PUSH_WORD((sp), (cpu_stack_t)(func)); /* LR -> 8(SP) */ \
 			CPU_PUSH_WORD((sp), 0);                  /* CR -> 4(SP) */ \
 		} while (0)
 
 #else
 	#define CPU_PUSH_CALL_FRAME(sp, func) \
-		CPU_PUSH_WORD((sp), (cpustack_t)(func))
+		CPU_PUSH_WORD((sp), (cpu_stack_t)(func))
 #endif
 
 /**
@@ -226,7 +214,7 @@
  * in hosted environments such as emulators.
  */
 #ifndef CPU_IDLE
-	#if defined(ARCH_EMUL) && (ARCH & ARCH_EMUL)
+	#if defined(ARCH_QT) && (ARCH & ARCH_QT)
 		/* This emulator hook should yield the CPU to the host.  */
 		EXTERN_C_BEGIN
 		void emul_idle(void);
@@ -237,4 +225,20 @@
 	#endif /* !ARCH_EMUL */
 #endif /* !CPU_IDLE */
 
+/**
+ * Default macro for creating a new Process stack
+ */
+#ifndef CPU_CREATE_NEW_STACK
+
+	#define CPU_CREATE_NEW_STACK(stack) \
+		do { \
+			size_t i; \
+			/* Initialize process stack frame */ \
+			CPU_PUSH_CALL_FRAME(stack, proc_entry); \
+			/* Push a clean set of CPU registers for asm_switch_context() */ \
+			for (i = 0; i < CPU_SAVED_REGS_CNT; i++) \
+				CPU_PUSH_WORD(stack, CPU_REG_INIT_VALUE(i)); \
+		} while (0)
+#endif
+
 #endif /* CPU_ATTR_H */