X-Git-Url: https://codewiz.org/gitweb?a=blobdiff_plain;f=bertos%2Fcpu%2Firq.h;h=011524b8f098bd874ab38d967aea34f6bde31426;hb=9ef85961c4d82f210fad41b2573e73056fce1369;hp=f47d708297868e019082898e3d77f4f5df491399;hpb=553d3b753ffdf718b585018b4b6730f32c98f9a1;p=bertos.git diff --git a/bertos/cpu/irq.h b/bertos/cpu/irq.h index f47d7082..011524b8 100644 --- a/bertos/cpu/irq.h +++ b/bertos/cpu/irq.h @@ -60,9 +60,6 @@ #define IRQ_RESTORE(x) FIXME #endif /* OS_EMBEDDED */ - #ifdef __GNUC__ - #define BREAKPOINT asm volatile ("int 3" ::) - #endif #elif CPU_ARM @@ -72,8 +69,8 @@ #if __CPU_MODE__ == 1 /* Thumb */ /* Use stubs */ - extern cpuflags_t get_CPSR(void); - extern void set_CPSR(cpuflags_t flags); + extern cpu_flags_t get_CPSR(void); + extern void set_CPSR(cpu_flags_t flags); #else #define get_CPSR __get_CPSR #define set_CPSR __set_CPSR @@ -96,8 +93,6 @@ #define IRQ_ENABLED() \ ((bool)(get_CPSR() & 0xb0)) - #define BREAKPOINT /* asm("bkpt 0") DOES NOT WORK */ - #else /* !__IAR_SYSTEMS_ICC__ */ #define IRQ_DISABLE \ @@ -143,7 +138,7 @@ #define CPU_READ_FLAGS() \ ({ \ - cpuflags_t sreg; \ + cpu_flags_t sreg; \ asm volatile ( \ "mrs %0, cpsr\n\t" \ : "=r" (sreg) \ @@ -168,13 +163,8 @@ #define IRQ_ENABLED() FIXME #endif /* OS_EMBEDDED */ - #ifdef __GNUC__ - #define BREAKPOINT asm volatile ("twge 2,2" ::) - #endif - #elif CPU_DSP56K - #define BREAKPOINT asm(debug) #define IRQ_DISABLE do { asm(bfset #0x0200,SR); asm(nop); } while (0) #define IRQ_ENABLE do { asm(bfclr #0x0200,SR); asm(nop); } while (0) @@ -262,10 +252,6 @@ #define IRQ_ASSERT_DISABLED() do {} while(0) #endif -// OBSOLETE names -#define ASSERT_IRQ_ENABLED() IRQ_ASSERT_ENABLED() -#define ASSERT_IRQ_DISABLED() IRQ_ASSERT_DISABLED() - /** * Execute \a CODE atomically with respect to interrupts. * @@ -273,16 +259,10 @@ */ #define ATOMIC(CODE) \ do { \ - cpuflags_t __flags; \ + cpu_flags_t __flags; \ IRQ_SAVE_DISABLE(__flags); \ CODE; \ IRQ_RESTORE(__flags); \ } while (0) - -#ifndef BREAKPOINT -#define BREAKPOINT /* nop */ -#endif - - #endif /* CPU_IRQ_H */