X-Git-Url: https://codewiz.org/gitweb?a=blobdiff_plain;f=cfg%2Fcpu_detect.h;h=615f952db456c229321ef71c7c73b299d8b0e844;hb=5f3952176a4e9a00ca8dd5ec4a6b994958f89e0a;hp=5e48b76e2371224f5ee75ba875733c642548cf53;hpb=6bf26ad78b32851d9dd56fbf68356bcbdded590e;p=bertos.git diff --git a/cfg/cpu_detect.h b/cfg/cpu_detect.h old mode 100755 new mode 100644 index 5e48b76e..615f952d --- a/cfg/cpu_detect.h +++ b/cfg/cpu_detect.h @@ -1,4 +1,4 @@ -/*! +/** * \file * * * \brief CPU detection through special preprocessor macros - * */ - -/*#* - *#* $Log$ - *#* Revision 1.1 2005/04/11 19:04:13 bernie - *#* Move top-level headers to cfg/ subdir. - *#* - *#* Revision 1.4 2005/02/16 20:33:24 bernie - *#* Preliminary PPC support. - *#* - *#* Revision 1.3 2004/12/31 17:39:26 bernie - *#* Use C89 comments only. - *#* - *#* Revision 1.2 2004/08/25 14:12:08 rasky - *#* Aggiornato il comment block dei log RCS - *#* - *#* Revision 1.1 2004/07/30 17:14:49 rasky - *#* File sfuggito al commit precedente (nuova gestione unificata del detect della CPU - *#* - *#* Revision 1.2 2004/07/30 10:31:07 rasky - *#* Aggiunto detect per ATmega128 - *#*/ - #ifndef CPU_DETECT_H #define CPU_DETECT_H -#if defined(__IAR_SYSTEMS_ICC) || defined(__IAR_SYSTEMS_ICC__) - #define CPU_I196 1 +#if defined(__arm__) /* GCC */ \ + || defined(__ARM4TM__) /* IAR: defined for all cores >= 4tm */ + #define CPU_ARM 1 + #define CPU_ID arm +#else + #define CPU_ARM 0 +#endif + +#if (defined(__IAR_SYSTEMS_ICC__) || defined(__IAR_SYSTEMS_ICC)) \ + && !defined(__ARM4TM__) /* IAR: if not ARM assume I196 */ + #warning Assuming CPU is I196 + #define CPU_I196 1 #define CPU_ID i196 #else #define CPU_I196 0 #endif -#if defined(__i386__) || defined(_MSC_VER) +#if defined(__i386__) /* GCC */ \ + || (defined(_M_IX86) && !defined(_WIN64)) /* MSVC */ + #define CPU_X86 1 + #define CPU_X86_32 1 + #define CPU_X86_64 0 + #define CPU_ID x86 +#elif defined(__x86_64__) /* GCC */ \ + || (defined(_M_IX86) && defined(_WIN64)) /* MSVC */ #define CPU_X86 1 + #define CPU_X86_32 0 + #define CPU_X86_64 1 #define CPU_ID x86 #else #define CPU_X86 0 + #define CPU_I386 0 + #define CPU_X86_64 0 #endif #if defined (_ARCH_PPC) || defined(_ARCH_PPC64) @@ -101,21 +99,35 @@ #else #define CPU_AVR_ATMEGA8 0 #endif + + #if defined(__AVR_ATmega168__) + #define CPU_AVR_ATMEGA168 1 + #else + #define CPU_AVR_ATMEGA168 0 + #endif + + #if defined(__AVR_ATmega1281__) + #define CPU_AVR_ATMEGA1281 1 + #else + #define CPU_AVR_ATMEGA1281 0 + #endif #else #define CPU_AVR 0 #define CPU_AVR_ATMEGA8 0 + #define CPU_AVR_ATMEGA168 0 #define CPU_AVR_ATMEGA64 0 #define CPU_AVR_ATMEGA103 0 #define CPU_AVR_ATMEGA128 0 + #define CPU_AVR_ATMEGA1281 0 #endif /* Self-check for the detection: only one CPU must be detected */ -#if CPU_I196 + CPU_X86 + CPU_PPC + CPU_DSP56K + CPU_AVR == 0 +#if CPU_ARM + CPU_I196 + CPU_X86 + CPU_PPC + CPU_DSP56K + CPU_AVR == 0 #error Unknown CPU #elif !defined(CPU_ID) #error CPU_ID not defined -#elif CPU_I196 + CPU_X86 + CPU_PPC + CPU_DSP56K + CPU_AVR != 1 +#elif CPU_ARM + CPU_I196 + CPU_X86 + CPU_PPC + CPU_DSP56K + CPU_AVR != 1 #error Internal CPU configuration error #endif