X-Git-Url: https://codewiz.org/gitweb?a=blobdiff_plain;f=cpu%2Farm%2Fdrv%2Fser_at91.c;h=37a4f1b695470b281c1e61188d32159bd5928a3c;hb=1fc31f45bcec8bc23a5924ae5b288439abca8ded;hp=339ce65991c3be7eb132b842a5f5a0f12c51dd48;hpb=3325db8b1e7a713d5c4cabb97dcaa488d93a3179;p=bertos.git

diff --git a/cpu/arm/drv/ser_at91.c b/cpu/arm/drv/ser_at91.c
index 339ce659..37a4f1b6 100644
--- a/cpu/arm/drv/ser_at91.c
+++ b/cpu/arm/drv/ser_at91.c
@@ -101,17 +101,17 @@
 	 *
 	 * - Disable GPIO on USART0 tx/rx pins
 	 * - Reset USART0
-	 * - Set serial param: mode Normal, 8bit data, 1bit stop
+	 * - Set serial param: mode Normal, 8bit data, 1bit stop, parity none
 	 * - Enable both the receiver and the transmitter
 	 * - Enable only the RX complete interrupt
 	 */
-	#if !CPU_ARM_AT91SAM7S256
+	#if !CPU_ARM_AT91SAM7S256 && !CPU_ARM_AT91SAM7X256
 		#warning Check USART0 pins!
 	#endif
 	#define SER_UART0_BUS_TXINIT do { \
-		PIOA_PDR = BV(5) | BV(6); \
+		PIOA_PDR = BV(RXD0) | BV(TXD0); \
 		US0_CR = BV(US_RSTRX) | BV(US_RSTTX); \
-		US0_MR = US_CHMODE_NORMAL | US_CHRL_8 | US_NBSTOP_1; \
+		US0_MR = US_CHMODE_NORMAL | US_CHRL_8 | US_NBSTOP_1 | US_PAR_NO; \
 		US0_CR = BV(US_RXEN) | BV(US_TXEN); \
 		US0_IER = BV(US_RXRDY); \
 	} while (0)
@@ -173,13 +173,13 @@
 
 #ifndef SER_UART1_BUS_TXINIT
 	/** \sa SER_UART1_BUS_TXINIT */
-	#if !CPU_ARM_AT91SAM7S256
+	#if !CPU_ARM_AT91SAM7S256 && !CPU_ARM_AT91SAM7X256
 		#warning Check USART1 pins!
 	#endif
 	#define SER_UART1_BUS_TXINIT do { \
-		PIOA_PDR = BV(21) | BV(22); \
+		PIOA_PDR = BV(RXD1) | BV(TXD1); \
 		US1_CR = BV(US_RSTRX) | BV(US_RSTTX); \
-		US1_MR = US_CHMODE_NORMAL | US_CHRL_8 | US_NBSTOP_1; \
+		US1_MR = US_CHMODE_NORMAL | US_CHRL_8 | US_NBSTOP_1 | US_PAR_NO; \
 		US1_CR = BV(US_RXEN) | BV(US_TXEN); \
 		US1_IER = BV(US_RXRDY); \
 	} while (0)
@@ -209,6 +209,33 @@
 	} while (0)
 #endif
 
+#ifdef NOT_FOR_ARM_PORT_IT
+/**
+ * \name Overridable SPI hooks
+ *
+ * These can be redefined in hw.h to implement
+ * special bus policies such as slave select pin handling, etc.
+ *
+ * \{
+ */
+#ifndef SER_SPI_BUS_TXINIT
+	/**
+	 * Default TXINIT macro - invoked in spi_init()
+	 * The default is no action.
+	 */
+	#define SER_SPI_BUS_TXINIT
+#endif
+
+#ifndef SER_SPI_BUS_TXCLOSE
+	/**
+	 * Invoked after the last character has been transmitted.
+	 * The default is no action.
+	 */
+	#define SER_SPI_BUS_TXCLOSE
+#endif
+/*\}*/
+#endif
+
 /**
  * \def CONFIG_SER_STROBE
  *
@@ -236,6 +263,11 @@ static unsigned char uart0_rxbuffer[CONFIG_UART0_RXBUFSIZE];
 static unsigned char uart1_txbuffer[CONFIG_UART1_TXBUFSIZE];
 static unsigned char uart1_rxbuffer[CONFIG_UART1_RXBUFSIZE];
 
+#ifdef NOT_FOR_ARM_PORT_IT
+static unsigned char spi_txbuffer[CONFIG_SPI_TXBUFSIZE];
+static unsigned char spi_rxbuffer[CONFIG_SPI_RXBUFSIZE];
+#endif
+
 /**
  * Internal hardware state structure
  *
@@ -269,6 +301,9 @@ struct ArmSerial
 struct Serial *ser_uart0 = &ser_handles[SER_UART0];
 struct Serial *ser_uart1 = &ser_handles[SER_UART1];
 
+#ifdef NOT_FOR_ARM_PORT_IT
+struct Serial *ser_spi = &ser_handles[SER_SPI];
+#endif
 
 static void uart0_irq_dispatcher(void);
 static void uart1_irq_dispatcher(void);
@@ -411,6 +446,123 @@ static void uart1_setparity(UNUSED_ARG(struct SerialHardware *, _hw), int parity
 
 }
 
+/* SPI driver */
+#ifdef NOT_FOR_ARM_PORT_IT
+static void spi_init(UNUSED_ARG(struct SerialHardware *, _hw), UNUSED_ARG(struct Serial *, ser))
+{
+	/*
+	 * Set MOSI and SCK ports out, MISO in.
+	 *
+	 * The ATmega64/128 datasheet explicitly states that the input/output
+	 * state of the SPI pins is not significant, as when the SPI is
+	 * active the I/O port are overrided.
+	 * This is *blatantly FALSE*.
+	 *
+	 * Moreover, the MISO pin on the board_kc *must* be in high impedance
+	 * state even when the SPI is off, because the line is wired together
+	 * with the KBus serial RX, and the transmitter of the slave boards
+	 * would be unable to drive the line.
+	 */
+	ATOMIC(SPI_DDR |= (BV(SPI_MOSI_BIT) | BV(SPI_SCK_BIT)));
+
+	/*
+	 * If the SPI master mode is activated and the SS pin is in input and tied low,
+	 * the SPI hardware will automatically switch to slave mode!
+	 * For proper communication this pins should therefore be:
+	 * - as output
+	 * - as input but tied high forever!
+	 * This driver set the pin as output.
+	 */
+	#warning SPI SS pin set as output for proper operation, check schematics for possible conflicts.
+	ATOMIC(SPI_DDR |= BV(SPI_SS_BIT));
+
+	ATOMIC(SPI_DDR &= ~BV(SPI_MISO_BIT));
+	/* Enable SPI, IRQ on, Master */
+	SPCR = BV(SPE) | BV(SPIE) | BV(MSTR);
+
+	/* Set data order */
+	#if CONFIG_SPI_DATA_ORDER == SER_LSB_FIRST
+		SPCR |= BV(DORD);
+	#endif
+
+	/* Set SPI clock rate */
+	#if CONFIG_SPI_CLOCK_DIV == 128
+		SPCR |= (BV(SPR1) | BV(SPR0));
+	#elif (CONFIG_SPI_CLOCK_DIV == 64 || CONFIG_SPI_CLOCK_DIV == 32)
+		SPCR |= BV(SPR1);
+	#elif (CONFIG_SPI_CLOCK_DIV == 16 || CONFIG_SPI_CLOCK_DIV == 8)
+		SPCR |= BV(SPR0);
+	#elif (CONFIG_SPI_CLOCK_DIV == 4 || CONFIG_SPI_CLOCK_DIV == 2)
+		// SPR0 & SDPR1 both at 0
+	#else
+		#error Unsupported SPI clock division factor.
+	#endif
+
+	/* Set SPI2X bit (spi double frequency) */
+	#if (CONFIG_SPI_CLOCK_DIV == 128 || CONFIG_SPI_CLOCK_DIV == 64 \
+	  || CONFIG_SPI_CLOCK_DIV == 16 || CONFIG_SPI_CLOCK_DIV == 4)
+		SPSR &= ~BV(SPI2X);
+	#elif (CONFIG_SPI_CLOCK_DIV == 32 || CONFIG_SPI_CLOCK_DIV == 8 || CONFIG_SPI_CLOCK_DIV == 2)
+		SPSR |= BV(SPI2X);
+	#else
+		#error Unsupported SPI clock division factor.
+	#endif
+
+	/* Set clock polarity */
+	#if CONFIG_SPI_CLOCK_POL == 1
+		SPCR |= BV(CPOL);
+	#endif
+
+	/* Set clock phase */
+	#if CONFIG_SPI_CLOCK_PHASE == 1
+		SPCR |= BV(CPHA);
+	#endif
+	SER_SPI_BUS_TXINIT;
+
+	SER_STROBE_INIT;
+}
+
+static void spi_cleanup(UNUSED_ARG(struct SerialHardware *, _hw))
+{
+	SPCR = 0;
+
+	SER_SPI_BUS_TXCLOSE;
+
+	/* Set all pins as inputs */
+	ATOMIC(SPI_DDR &= ~(BV(SPI_MISO_BIT) | BV(SPI_MOSI_BIT) | BV(SPI_SCK_BIT) | BV(SPI_SS_BIT)));
+}
+
+static void spi_starttx(struct SerialHardware *_hw)
+{
+	struct AvrSerial *hw = (struct AvrSerial *)_hw;
+
+	cpuflags_t flags;
+	IRQ_SAVE_DISABLE(flags);
+
+	/* Send data only if the SPI is not already transmitting */
+	if (!hw->sending && !fifo_isempty(&ser_spi->txfifo))
+	{
+		hw->sending = true;
+		SPDR = fifo_pop(&ser_spi->txfifo);
+	}
+
+	IRQ_RESTORE(flags);
+}
+
+static void spi_setbaudrate(
+	UNUSED_ARG(struct SerialHardware *, _hw),
+	UNUSED_ARG(unsigned long, rate))
+{
+	// nop
+}
+
+static void spi_setparity(UNUSED_ARG(struct SerialHardware *, _hw), UNUSED_ARG(int, parity))
+{
+	// nop
+}
+#endif
+
+
 static bool tx_sending(struct SerialHardware* _hw)
 {
 	struct ArmSerial *hw = (struct ArmSerial *)_hw;
@@ -450,6 +602,18 @@ static const struct SerialHardwareVT UART1_VT =
 	C99INIT(txSending, tx_sending),
 };
 
+#ifdef NOT_FOR_ARM_PORT_IT
+static const struct SerialHardwareVT SPI_VT =
+{
+	C99INIT(init, spi_init),
+	C99INIT(cleanup, spi_cleanup),
+	C99INIT(setBaudrate, spi_setbaudrate),
+	C99INIT(setParity, spi_setparity),
+	C99INIT(txStart, spi_starttx),
+	C99INIT(txSending, tx_sending),
+};
+#endif
+
 static struct ArmSerial UARTDescs[SER_CNT] =
 {
 	{
@@ -471,7 +635,19 @@ static struct ArmSerial UARTDescs[SER_CNT] =
 			C99INIT(rxbuffer_size, sizeof(uart1_rxbuffer)),
 		},
 		C99INIT(sending, false),
+	},
+#ifdef NOT_FOR_ARM_PORT_IT
+	{
+		C99INIT(hw, /**/) {
+			C99INIT(table, &SPI_VT),
+			C99INIT(txbuffer, spi_txbuffer),
+			C99INIT(rxbuffer, spi_rxbuffer),
+			C99INIT(txbuffer_size, sizeof(spi_txbuffer)),
+			C99INIT(rxbuffer_size, sizeof(spi_rxbuffer)),
+		},
+		C99INIT(sending, false),
 	}
+#endif
 };
 
 struct SerialHardware *ser_hw_getdesc(int unit)
@@ -527,18 +703,17 @@ static void uart0_irq_rx(void)
 /**
  * Serial IRQ dispatcher for USART0.
  */
-static void uart0_irq_dispatcher(void) __attribute__ ((naked));
+static void uart0_irq_dispatcher(void) __attribute__ ((interrupt));
 static void uart0_irq_dispatcher(void)
 {
-	IRQ_ENTRY();
-
-	if (US0_IMR & BV(US_RXRDY))
+	if (US0_CSR & BV(US_RXRDY))
 		uart0_irq_rx();
 
-	if (US0_IMR & BV(US_TXRDY))
+	if (US0_CSR & BV(US_TXRDY))
 		uart0_irq_tx();
 
-	IRQ_EXIT();
+	/* Inform hw that we have served the IRQ */
+	AIC_EOICR = 0;
 }
 
 /**
@@ -588,16 +763,15 @@ static void uart1_irq_rx(void)
 /**
  * Serial IRQ dispatcher for USART1.
  */
-static void uart1_irq_dispatcher(void) __attribute__ ((naked));
+static void uart1_irq_dispatcher(void) __attribute__ ((interrupt));
 static void uart1_irq_dispatcher(void)
 {
-	IRQ_ENTRY();
-
-	if (US1_IMR & BV(US_RXRDY))
+	if (US1_CSR & BV(US_RXRDY))
 		uart1_irq_rx();
 
-	if (US1_IMR & BV(US_TXRDY))
+	if (US1_CSR & BV(US_TXRDY))
 		uart1_irq_tx();
 
-	IRQ_EXIT();
+	/* Inform hw that we have served the IRQ */
+	AIC_EOICR = 0;
 }