X-Git-Url: https://codewiz.org/gitweb?a=blobdiff_plain;f=cpu%2Farm%2Fio%2Fat91_us.h;h=20541a762c96551ab4a42f0e33c1e7c781c5536a;hb=4f8d7e21683129063caec365f37e9a90501c3891;hp=44bfe855d2b35af6089ad061d4dc17683749cf47;hpb=276dbfff26fb2a1626351f2cafc4334367d47b72;p=bertos.git

diff --git a/cpu/arm/io/at91_us.h b/cpu/arm/io/at91_us.h
index 44bfe855..20541a76 100644
--- a/cpu/arm/io/at91_us.h
+++ b/cpu/arm/io/at91_us.h
@@ -30,7 +30,7 @@
  *
  * -->
  *
- * \version $Id: at91_aic.h 18260 2007-10-11 14:08:10Z batt $
+ * \version $Id: at91_us.h 20544 2008-02-14 12:15:57Z batt $
  *
  * \author Daniele Basile <asterix@develer.com>
  *
@@ -284,16 +284,16 @@
 #if USART_HAS_PDC
 
 	/**
-	* Receive Pointer Register
-	*/
+	 * Receive Pointer Register
+	 */
 	/*\{*/
 	#define US0_RPR (*((reg32_t *)(USART0_BASE + PERIPH_RPR_OFF)))      ///< Channel 0 receive pointer register address.
 	#define US1_RPR (*((reg32_t *)(USART1_BASE + PERIPH_RPR_OFF)))      ///< Channel 1 receive pointer register address.
 	/*\}*/
 
 	/**
-	* Receive Counter Register
-	*/
+	 * Receive Counter Register
+	 */
 	/*\{*/
 	#define US0_RCR (*((reg32_t *)(USART0_BASE + PERIPH_RCR_OFF)))      ///< Channel 0 receive counter register address.
 	#define US1_RCR (*((reg32_t *)(USART1_BASE + PERIPH_RCR_OFF)))      ///< Channel 1 receive counter register address.
@@ -341,5 +341,4 @@
 
 #endif  /* USART_HAS_PDC */
 
-
 #endif /* AT91_US_H */