X-Git-Url: https://codewiz.org/gitweb?a=blobdiff_plain;f=cpu%2Farm%2Fio%2Fat91_us.h;h=3d7302ed635c8f5ab14b73262ffd263370644cdf;hb=1ab5fa0763879ab997884c8bc88631b69205a191;hp=12e20ca589d371fe8c7e48df543a12ca5476f0fc;hpb=622422172d6341cc0796c9c481050817b4e6b5fc;p=bertos.git

diff --git a/cpu/arm/io/at91_us.h b/cpu/arm/io/at91_us.h
index 12e20ca5..3d7302ed 100644
--- a/cpu/arm/io/at91_us.h
+++ b/cpu/arm/io/at91_us.h
@@ -30,7 +30,7 @@
  *
  * -->
  *
- * \version $Id: at91_aic.h 18260 2007-10-11 14:08:10Z batt $
+ * \version $Id: at91_us.h 20354 2008-01-23 11:51:13Z asterix $
  *
  * \author Daniele Basile <asterix@develer.com>
  *
@@ -284,16 +284,16 @@
 #if USART_HAS_PDC
 
 	/**
-	* Receive Pointer Register
-	*/
+	 * Receive Pointer Register
+	 */
 	/*\{*/
 	#define US0_RPR (*((reg32_t *)(USART0_BASE + PERIPH_RPR_OFF)))      ///< Channel 0 receive pointer register address.
 	#define US1_RPR (*((reg32_t *)(USART1_BASE + PERIPH_RPR_OFF)))      ///< Channel 1 receive pointer register address.
 	/*\}*/
 
 	/**
-	* Receive Counter Register
-	*/
+	 * Receive Counter Register
+	 */
 	/*\{*/
 	#define US0_RCR (*((reg32_t *)(USART0_BASE + PERIPH_RCR_OFF)))      ///< Channel 0 receive counter register address.
 	#define US1_RCR (*((reg32_t *)(USART1_BASE + PERIPH_RCR_OFF)))      ///< Channel 1 receive counter register address.