X-Git-Url: https://codewiz.org/gitweb?a=blobdiff_plain;f=cpu%2Farm%2Fio%2Fat91_us.h;h=44bfe855d2b35af6089ad061d4dc17683749cf47;hb=b8b3383870fba0c7a44ffc57b7f172f573fc5139;hp=a8038cb1fbe03e298452ee80d33300b49b46449d;hpb=dd8bd06f4cf326c1e585d685aa8378b1e943fd5a;p=bertos.git

diff --git a/cpu/arm/io/at91_us.h b/cpu/arm/io/at91_us.h
index a8038cb1..44bfe855 100644
--- a/cpu/arm/io/at91_us.h
+++ b/cpu/arm/io/at91_us.h
@@ -79,7 +79,7 @@
 #define US_CR_OFF               0x00000000      ///< USART control register offset.
 #define US0_CR  (*((reg32_t *)(USART0_BASE + US_CR_OFF)))       ///< Channel 0 control register address.
 #define US1_CR  (*((reg32_t *)(USART1_BASE + US_CR_OFF)))       ///< Channel 1 control register address.
-#define US_RSTRX                         2      ///< Reset receiver. */
+#define US_RSTRX                         2      ///< Reset receiver.
 #define US_RSTTX                         3      ///< Reset transmitter.
 #define US_RXEN                          4      ///< Receiver enable.
 #define US_RXDIS                         5      ///< Receiver disable.
@@ -91,7 +91,7 @@
 #define US_STTTO                         11     ///< Start timeout.
 #define US_SENDA                         12     ///< Send next byte with address bit set.
 #define US_RSTIT                         13     ///< Reset interations.
-#define US_RTSNAK                        14     ///< Reset non acknowledge.
+#define US_RSTNAK                        14     ///< Reset non acknowledge.
 #define US_RETTO                         15     ///< Rearm time out.
 #define US_DTREN                         16     ///< Data terminal ready enable.
 #define US_DTRDIS                        17     ///< Data terminal ready disable.
@@ -234,8 +234,6 @@
 #define US_BRGR_OFF             0x00000020      ///< USART baud rate register offset.
 #define US0_BRGR (*((reg32_t *)(USART0_BASE + US_BRGR_OFF)))    ///< Channel 0 baud rate register address.
 #define US1_BRGR (*((reg32_t *)(USART1_BASE + US_BRGR_OFF)))    ///< Channel 1 baud rate register address.
-#define US_BRGR_MASK            0x0000FFFF      ///< Clock divider.
-#define US_BRGR_FP_MASK         0x001F0000      ///< Fractional part.
 /*\}*/
 
 /**