X-Git-Url: https://codewiz.org/gitweb?a=blobdiff_plain;f=cpu%2Fcpu.h;fp=cpu%2Fcpu.h;h=cf79f7efd4483fbc8c8b1c11ea4f843812a3adad;hb=567718e7a363d331a9d5a90834679e64822f475a;hp=af769d644293c3e5f37221328c2a5acc655df6b1;hpb=96bda3a8889719af5e4475aaf853487f2e99e01f;p=bertos.git

diff --git a/cpu/cpu.h b/cpu/cpu.h
index af769d64..cf79f7ef 100644
--- a/cpu/cpu.h
+++ b/cpu/cpu.h
@@ -120,7 +120,7 @@
 	/* Register counts include SREG too */
 	#define CPU_REG_BITS           32
 	#define CPU_REGS_CNT           16
-	#define CPU_SAVED_REGS_CNT     FIXME
+	#define CPU_SAVED_REGS_CNT     9
 	#define CPU_STACK_GROWS_UPWARD 0
 	#define CPU_SP_ON_EMPTY_SLOT   0
 	#define CPU_BYTE_ORDER         (__BIG_ENDIAN__ ? CPU_BIG_ENDIAN : CPU_LITTLE_ENDIAN)
@@ -203,7 +203,7 @@
 			); \
 		} while (0)
 
-		#define IRQ_GETSTATE() \
+		#define CPU_READ_FLAGS() \
 		({ \
 			uint32_t sreg; \
 			asm volatile ( \
@@ -211,9 +211,20 @@
 				: "=r" (sreg) \
 				: /* no inputs */ \
 			); \
-			!((sreg & 0xc0) == 0xc0); \
+			sreg; \
 		})
 
+		#define IRQ_GETSTATE() (!((CPU_READ_FLAGS() & 0xc0) == 0xc0))
+
+		/**
+	 	 * Initialization value for registers in stack frame.
+	 	 * The register index is not directly corrispondent to CPU
+	 	 * register numbers, but is related to how are pushed to stack (\see asm_switch_context).
+		 * Index (CPU_SAVED_REGS_CNT - 1) is the CPSR register:
+		 * the initial value is taken from current CPSR.
+	 	 */
+		#define CPU_REG_INIT_VALUE(reg) (reg == (CPU_SAVED_REGS_CNT - 1) ? CPU_READ_FLAGS() : 0)
+
 	#endif /* !__IAR_SYSTEMS_ICC_ */
 
 #elif CPU_PPC