X-Git-Url: https://codewiz.org/gitweb?a=blobdiff_plain;f=cpu%2Firq.h;h=31c2bc79cf6879213f93d296cc1409ca01a59a40;hb=ca668b2ed5b4b0a74ab3a4a895cc50cce328c378;hp=428ba2d76732d13b0f82cb32f20c72ae606c9a59;hpb=efbdba7e2814415234ef47bd10ff888559ea90af;p=bertos.git

diff --git a/cpu/irq.h b/cpu/irq.h
index 428ba2d7..31c2bc79 100644
--- a/cpu/irq.h
+++ b/cpu/irq.h
@@ -151,6 +151,28 @@
 
 		#define IRQ_ENABLED() ((CPU_READ_FLAGS() & 0xc0) != 0xc0)
 
+		/**
+		 * Interrupt entry point.
+		 * Needed because AT91 uses an Interrupt Controller with auto-vectoring.
+		 */
+		#define IRQ_ENTRY() \
+			asm volatile("sub   lr, lr,#4"          "\n\t"  /* Adjust LR */ \
+				"stmfd sp!,{r0-r12,lr}"    "\n\t"  /* Save registers on IRQ stack. */ \
+				"mrs   r1, spsr"           "\n\t"  /* Save SPSR */ \
+				"stmfd sp!,{r1}"           "\n\t")     /* */
+
+		/**
+		 * Interrupt exit.
+		 * Needed because AT91 uses an Interrupt Controller with auto-vectoring.
+		 */
+		#define IRQ_EXIT() \
+			asm volatile("ldmfd sp!, {r1}"          "\n\t"  /* Restore SPSR */ \
+				"msr   spsr_c, r1"         "\n\t"  /* */ \
+				"ldr   r0, =0xFFFFF000"    "\n\t"  /* End of interrupt. */ \
+				"str   r0, [r0, #0x130]"   "\n\t"  /* */ \
+				"ldmfd sp!, {r0-r12, pc}^" "\n\t")     /* Restore registers and return. */
+
+
 	#endif /* !__IAR_SYSTEMS_ICC_ */
 
 #elif CPU_PPC
@@ -220,6 +242,15 @@
 	#error No CPU_... defined.
 #endif
 
+#ifndef IRQ_ENTRY
+	#define IRQ_ENTRY() /* NOP */
+#endif
+
+#ifndef IRQ_EXIT
+	#define IRQ_EXIT() /* NOP */
+#endif
+
+
 /**
  * Execute \a CODE atomically with respect to interrupts.
  *