X-Git-Url: https://codewiz.org/gitweb?a=blobdiff_plain;f=drv%2Feeprom.c;h=4e7f615fe6068e8589a35482d4ecd6aa4f2c1cf1;hb=2535cb94ec2183791128f8bbd109ca69a960cf78;hp=e951daee5b20bcf2cdb71cdf3c5e518ed9b47947;hpb=3e118066018047a7a1cffebb15eb1e8a7c73d6d7;p=bertos.git diff --git a/drv/eeprom.c b/drv/eeprom.c old mode 100755 new mode 100644 index e951daee..4e7f615f --- a/drv/eeprom.c +++ b/drv/eeprom.c @@ -1,8 +1,33 @@ -/*! +/** * \file * * * \brief Driver for the 24xx16 and 24xx256 I2C EEPROMS (implementation) @@ -14,235 +39,38 @@ * \author Bernardo Innocenti */ -/*#* - *#* $Log$ - *#* Revision 1.13 2004/11/16 20:58:51 bernie - *#* Add write verify. - *#* - *#* Revision 1.12 2004/11/02 17:50:01 bernie - *#* CONFIG_EEPROM_VERIFY: New config option. - *#* - *#* Revision 1.11 2004/10/26 08:35:31 bernie - *#* Reset watchdog for long operations. - *#* - *#* Revision 1.10 2004/09/20 03:31:22 bernie - *#* Sanitize for C++. - *#* - *#* Revision 1.9 2004/09/14 21:03:46 bernie - *#* Use debug.h instead of kdebug.h. - *#* - *#* Revision 1.8 2004/08/25 14:12:08 rasky - *#* Aggiornato il comment block dei log RCS - *#* - *#* Revision 1.7 2004/08/24 16:48:40 bernie - *#* Note reason for including - *#* - *#* Revision 1.6 2004/08/24 14:27:20 bernie - *#* Doxygen fix. - *#* - *#* Revision 1.5 2004/08/24 13:46:48 bernie - *#* Include . - *#* - *#* Revision 1.4 2004/08/10 06:57:22 bernie - *#* eeprom_erase(): New function. - *#* - *#* Revision 1.3 2004/07/29 22:57:09 bernie - *#* Add 24LC16 support. - *#* - *#* Revision 1.2 2004/07/22 01:24:43 bernie - *#* Document AVR dependency. - *#* - *#* Revision 1.1 2004/07/20 17:11:18 bernie - *#* Import into DevLib. - *#* - *#*/ - #include "eeprom.h" +#include +#include // CONFIG_EEPROM_VERIFY +#include // MIN() +#include +#include CPU_HEADER(twi) #include -#include /* cpu_to_be16() */ -#include -#include -#include // CONFIG_EEPROM_VERIFY -#include // MIN() +#include // cpu_to_be16() #include // memset() -#include // Configuration sanity checks #if !defined(CONFIG_EEPROM_VERIFY) || (CONFIG_EEPROM_VERIFY != 0 && CONFIG_EEPROM_VERIFY != 1) #error CONFIG_EEPROM_VERIFY must be defined to either 0 or 1 #endif - -/* Wait for TWINT flag set: bus is ready */ -#define WAIT_TWI_READY do {} while (!(TWCR & BV(TWINT))) - -/*! \name EEPROM control codes */ -/*@{*/ -#define SLA_W 0xA0 -#define SLA_R 0xA1 -/*@}*/ - - -/*! - * Send START condition on the bus. - * - * \return true on success, false otherwise. - */ -static bool twi_start(void) -{ - TWCR = BV(TWINT) | BV(TWSTA) | BV(TWEN); - WAIT_TWI_READY; - - if (TW_STATUS == TW_START || TW_STATUS == TW_REP_START) - return true; - - DB(kprintf("!TW_(REP)START: %x\n", TWSR);) - return false; -} - - -/*! - * Send START condition and select slave for write. - * - * \return true on success, false otherwise. - */ -static bool twi_start_w(uint8_t slave_addr) -{ - ASSERT(slave_addr < 8); - - /* - * Loop on the select write sequence: when the eeprom is busy - * writing previously sent data it will reply to the SLA_W - * control byte with a NACK. In this case, we must - * keep trying until the eeprom responds with an ACK. - */ - while (twi_start()) - { - TWDR = SLA_W | (slave_addr << 1); - TWCR = BV(TWINT) | BV(TWEN); - WAIT_TWI_READY; - - if (TW_STATUS == TW_MT_SLA_ACK) - return true; - else if (TW_STATUS != TW_MT_SLA_NACK) - { - DB(kprintf("!TW_MT_SLA_(N)ACK: %x\n", TWSR);) - break; - } - } - - return false; -} - - -/*! - * Send START condition and select slave for read. - * - * \return true on success, false otherwise. - */ -static bool twi_start_r(uint8_t slave_addr) -{ - ASSERT(slave_addr < 8); - - if (twi_start()) - { - TWDR = SLA_R | (slave_addr << 1); - TWCR = BV(TWINT) | BV(TWEN); - WAIT_TWI_READY; - - if (TW_STATUS == TW_MR_SLA_ACK) - return true; - - DB(kprintf("!TW_MR_SLA_ACK: %x\n", TWSR);) - } - - return false; -} - - -/*! - * Send STOP condition. +/** + * EEPROM ID code */ -static void twi_stop(void) -{ - TWCR = BV(TWINT) | BV(TWEN) | BV(TWSTO); -} +#define EEPROM_ID 0xA0 - -/*! - * Send a sequence of bytes in master transmitter mode - * to the selected slave device through the TWI bus. - * - * \return true on success, false on error. +/** + * This macros form the correct slave address for EEPROMs */ -static bool twi_send(const void *_buf, size_t count) -{ - const uint8_t *buf = (const uint8_t *)_buf; +#define EEPROM_ADDR(x) (EEPROM_ID | (((uint8_t)(x)) << 1)) - while (count--) - { - TWDR = *buf++; - TWCR = BV(TWINT) | BV(TWEN); - WAIT_TWI_READY; - if (TW_STATUS != TW_MT_DATA_ACK) - { - DB(kprintf("!TW_MT_DATA_ACK: %x\n", TWSR);) - return false; - } - } - return true; -} -/*! - * Receive a sequence of one or more bytes from the - * selected slave device in master receive mode through - * the TWI bus. - * - * Received data is placed in \c buf. - * - * \return true on success, false on error - */ -static bool twi_recv(void *_buf, size_t count) -{ - uint8_t *buf = (uint8_t *)_buf; - - /* - * When reading the last byte the TWEA bit is not - * set, and the eeprom should answer with NACK - */ - while (count--) - { - TWCR = BV(TWINT) | BV(TWEN) | (count ? BV(TWEA) : 0); - WAIT_TWI_READY; - - if (count) - { - if (TW_STATUS != TW_MR_DATA_ACK) - { - DB(kprintf("!TW_MR_DATA_ACK: %x\n", TWSR);) - return false; - } - } - else - { - if (TW_STATUS != TW_MR_DATA_NACK) - { - DB(kprintf("!TW_MR_DATA_NACK: %x\n", TWSR);) - return false; - } - } - *buf++ = TWDR; - } - - return true; -} - -/*! +/** * Copy \c count bytes from buffer \c buf to * eeprom at address \c addr. */ @@ -269,7 +97,7 @@ static bool eeprom_writeRaw(e2addr_t addr, const void *buf, size_t count) uint8_t blk_offs = (uint8_t)addr; result = - twi_start_w(blk_addr) + twi_start_w(EEPROM_ADDR(blk_addr)) && twi_send(&blk_offs, sizeof blk_offs) && twi_send(buf, size); @@ -279,7 +107,7 @@ static bool eeprom_writeRaw(e2addr_t addr, const void *buf, size_t count) uint16_t addr_be = cpu_to_be16(addr); result = - twi_start_w(0) + twi_start_w(EEPROM_ID) && twi_send((uint8_t *)&addr_be, sizeof addr_be) && twi_send(buf, size); @@ -308,7 +136,7 @@ static bool eeprom_writeRaw(e2addr_t addr, const void *buf, size_t count) #if CONFIG_EEPROM_VERIFY -/*! +/** * Check that the contents of an EEPROM range * match with a provided data buffer. * @@ -368,7 +196,7 @@ bool eeprom_write(e2addr_t addr, const void *buf, size_t count) } -/*! +/** * Copy \c count bytes at address \c addr * from eeprom to RAM to buffer \c buf. * @@ -387,9 +215,9 @@ bool eeprom_read(e2addr_t addr, void *buf, size_t count) uint8_t blk_offs = (uint8_t)addr; bool res = - twi_start_w(blk_addr) + twi_start_w(EEPROM_ADDR(blk_addr)) && twi_send(&blk_offs, sizeof blk_offs) - && twi_start_r(blk_addr) + && twi_start_r(EEPROM_ADDR(blk_addr)) && twi_recv(buf, count); #elif CONFIG_EEPROM_TYPE == EEPROM_24XX256 @@ -398,9 +226,9 @@ bool eeprom_read(e2addr_t addr, void *buf, size_t count) addr = cpu_to_be16(addr); bool res = - twi_start_w(0) + twi_start_w(EEPROM_ID) && twi_send((uint8_t *)&addr, sizeof(addr)) - && twi_start_r(0) + && twi_start_r(EEPROM_ID) && twi_recv(buf, count); #else #error Unknown device type @@ -414,7 +242,7 @@ bool eeprom_read(e2addr_t addr, void *buf, size_t count) } -/*! +/** * Write a single character \a c at address \a addr. */ bool eeprom_write_char(e2addr_t addr, char c) @@ -423,7 +251,7 @@ bool eeprom_write_char(e2addr_t addr, char c) } -/*! +/** * Read a single character at address \a addr. * * \return the requested character or -1 in case of failure. @@ -439,7 +267,7 @@ int eeprom_read_char(e2addr_t addr) } -/*! +/** * Erase specified part of eeprom, writing 0xFF. * * \param addr starting address @@ -464,43 +292,12 @@ void eeprom_erase(e2addr_t addr, size_t count) } -/*! +/** * Initialize TWI module. */ void eeprom_init(void) { - cpuflags_t flags; - DISABLE_IRQSAVE(flags); - - /* - * This is pretty useless according to AVR's datasheet, - * but it helps us driving the TWI data lines on boards - * where the bus pull-up resistors are missing. This is - * probably due to some unwanted interaction between the - * port pin and the TWI lines. - */ -#if defined(__AVR_ATmega64__) - PORTD |= BV(PD0) | BV(PD1); - DDRD |= BV(PD0) | BV(PD1); -#elif defined(__AVR_ATmega8__) - PORTC |= BV(PC4) | BV(PC5); - DDRC |= BV(PC4) | BV(PC5); -#else - #error Unsupported architecture -#endif - - /* - * Set speed: - * F = CLOCK_FREQ / (16 + 2*TWBR * 4^TWPS) - */ - #define TWI_FREQ 100000 /* ~100 kHz */ - #define TWI_PRESC 1 /* 4 ^ TWPS */ - - TWBR = (CLOCK_FREQ / (2 * TWI_FREQ * TWI_PRESC)) - (8 / TWI_PRESC); - TWSR = 0; - TWCR = BV(TWEN); - - ENABLE_IRQRESTORE(flags); + twi_init(); } @@ -516,11 +313,15 @@ void eeprom_test(void) // Write something to EEPROM using unaligned sequential writes for (i = 0; i < 42; ++i) + { + wdt_reset(); eeprom_write(i * sizeof magic, magic, sizeof magic); + } // Read back with single-byte reads for (i = 0; i < 42 * sizeof magic; ++i) { + wdt_reset(); eeprom_read(i, buf, 1); kprintf("EEPROM byte read: %c (%d)\n", buf[0], buf[0]); ASSERT(buf[0] == magic[i % sizeof magic]); @@ -529,6 +330,7 @@ void eeprom_test(void) // Read back again using sequential reads for (i = 0; i < 42; ++i) { + wdt_reset(); memset(buf, 0, sizeof buf); eeprom_read(i * sizeof magic, buf, sizeof magic); kprintf("EEPROM seq read @ 0x%x: '%s'\n", i * sizeof magic, buf);