X-Git-Url: https://codewiz.org/gitweb?a=blobdiff_plain;f=drv%2Fser_avr.c;h=2d0ae6d0ddf3dc5287932433ff7ece93d3f926e2;hb=b25aabb82dd47404b0697e1394fd3a14963e1224;hp=78a3058d3020e1080cc34c67ad9486b8d64d1644;hpb=ea907b91f4feb6acff1329f903c99cf03f8bb893;p=bertos.git

diff --git a/drv/ser_avr.c b/drv/ser_avr.c
index 78a3058d..2d0ae6d0 100755
--- a/drv/ser_avr.c
+++ b/drv/ser_avr.c
@@ -3,7 +3,7 @@
  * <!--
  * Copyright 2003, 2004 Develer S.r.l. (http://www.develer.com/)
  * Copyright 2000 Bernardo Innocenti <bernie@codewiz.org>
- * This file is part of DevLib - See devlib/README for information.
+ * This file is part of DevLib - See README.devlib for information.
  * -->
  *
  * \brief AVR UART and SPI I/O driver
@@ -38,6 +38,48 @@
 
 /*#*
  *#* $Log$
+ *#* Revision 1.31  2006/05/18 00:37:29  bernie
+ *#* Use hw_ser.h instead of ubiquitous hw.h.
+ *#*
+ *#* Revision 1.30  2006/02/17 22:23:06  bernie
+ *#* Update POSIX serial emulator.
+ *#*
+ *#* Revision 1.29  2005/11/27 23:31:48  bernie
+ *#* Support avr-libc 1.4.
+ *#*
+ *#* Revision 1.28  2005/11/04 16:20:02  bernie
+ *#* Fix reference to README.devlib in header.
+ *#*
+ *#* Revision 1.27  2005/07/03 15:19:31  bernie
+ *#* Doxygen fix.
+ *#*
+ *#* Revision 1.26  2005/04/11 19:10:27  bernie
+ *#* Include top-level headers from cfg/ subdir.
+ *#*
+ *#* Revision 1.25  2005/01/25 08:37:26  bernie
+ *#* CONFIG_SER_HWHANDSHAKE fixes.
+ *#*
+ *#* Revision 1.24  2005/01/14 00:49:16  aleph
+ *#* Rename callbacks; SerialHardwareVT.txSending: New callback; Add SPI_BUS macros.
+ *#*
+ *#* Revision 1.23  2005/01/11 18:09:07  aleph
+ *#* Add ATmega8 SPI port definitions; Fix transmit complete IRQ bug; add strobe macros to uart1 and spi
+ *#*
+ *#* Revision 1.22  2004/12/31 17:47:45  bernie
+ *#* Rename UNUSED() to UNUSED_ARG().
+ *#*
+ *#* Revision 1.21  2004/12/13 12:07:06  bernie
+ *#* DISABLE_IRQSAVE/ENABLE_IRQRESTORE: Convert to IRQ_SAVE_DISABLE/IRQ_RESTORE.
+ *#*
+ *#* Revision 1.20  2004/12/13 11:51:43  bernie
+ *#* Fix a latent bug with reentrant serial IRQs.
+ *#*
+ *#* Revision 1.19  2004/12/13 11:51:08  bernie
+ *#* DISABLE_INTS/ENABLE_INTS: Convert to IRQ_DISABLE/IRQ_ENABLE.
+ *#*
+ *#* Revision 1.18  2004/12/08 08:03:48  bernie
+ *#* Doxygen fixes.
+ *#*
  *#* Revision 1.17  2004/10/19 07:52:35  bernie
  *#* Reset parity bits before overwriting them (Fixed by batt in project_ks).
  *#*
@@ -87,34 +129,32 @@
 
 #include "ser.h"
 #include "ser_p.h"
-#include "config.h"
-#include "hw.h"  /* Required for bus macros overrides */
+#include "hw_ser.h"  /* Required for bus macros overrides */
+#include <appconfig.h>
 
-#include <debug.h>
+#include <cfg/debug.h>
 #include <drv/timer.h>
 #include <mware/fifobuf.h>
 
-#include <avr/signal.h>
 #include <avr/io.h>
+#if defined(__AVR_LIBC_VERSION__) && (__AVR_LIBC_VERSION__ >= 10400UL)
+	#include <avr/interrupt.h>
+#else
+	#include <avr/signal.h>
+#endif
 
 
-/*!
- * \name Hardware handshake (RTS/CTS).
- * \{
- */
-#ifndef RTS_ON
-#define RTS_ON      do {} while (0)
-#endif
-#ifndef RTS_OFF
-#define RTS_OFF     do {} while (0)
-#endif
-#ifndef IS_CTS_ON
-#define IS_CTS_ON   true
-#endif
-#ifndef EIMSKB_CTS
-#define EIMSKB_CTS  0 /*!< Dummy value, must be overridden */
+#if !CONFIG_SER_HWHANDSHAKE
+	/*!
+	 * \name Hardware handshake (RTS/CTS).
+	 * \{
+	 */
+	#define RTS_ON      do {} while (0)
+	#define RTS_OFF     do {} while (0)
+	#define IS_CTS_ON   true
+	#define EIMSKF_CTS  0 /*!< Dummy value, must be overridden */
+	/*\}*/
 #endif
-/*\}*/
 
 
 /*!
@@ -191,6 +231,9 @@
 	 *
 	 * The default is no action.
 	 */
+	#ifdef __doxygen__
+	#define SER_UART0_BUS_TXOFF
+	#endif
 #endif
 
 #ifndef SER_UART1_BUS_TXINIT
@@ -223,16 +266,55 @@
 	 *
 	 * \see SER_UART0_BUS_TXOFF
 	 */
+	#ifdef __doxygen__
+	#define SER_UART1_BUS_TXOFF
+	#endif
+#endif
+/*\}*/
+
+
+/*!
+ * \name Overridable SPI hooks
+ *
+ * These can be redefined in hw.h to implement
+ * special bus policies such as slave select pin handling, etc.
+ *
+ * \{
+ */
+#ifndef SER_SPI_BUS_TXINIT
+	/*!
+	 * Default TXINIT macro - invoked in spi_init()
+	 * The default is no action.
+	 */
+	#define SER_SPI_BUS_TXINIT
+#endif
+
+#ifndef SER_SPI_BUS_TXCLOSE
+	/*!
+	 * Invoked after the last character has been transmitted.
+	 * The default is no action.
+	 */
+	#define SER_SPI_BUS_TXCLOSE
 #endif
 /*\}*/
 
 
 /* SPI port and pin configuration */
-#define SPI_PORT      PORTB
-#define SPI_DDR       DDRB
-#define SPI_SCK_BIT   PB1
-#define SPI_MOSI_BIT  PB2
-#define SPI_MISO_BIT  PB3
+#if CPU_AVR_ATMEGA64 || CPU_AVR_ATMEGA128 || CPU_AVR_ATMEGA103
+	#define SPI_PORT      PORTB
+	#define SPI_DDR       DDRB
+	#define SPI_SCK_BIT   PB1
+	#define SPI_MOSI_BIT  PB2
+	#define SPI_MISO_BIT  PB3
+#elif CPU_AVR_ATMEGA8
+	#define SPI_PORT      PORTB
+	#define SPI_DDR       DDRB
+	#define SPI_SCK_BIT   PB5
+	#define SPI_MOSI_BIT  PB3
+	#define SPI_MISO_BIT  PB4
+#else
+	#error Unknown architecture
+#endif
 
 /* USART register definitions */
 #if CPU_AVR_ATMEGA64 || CPU_AVR_ATMEGA128
@@ -247,6 +329,7 @@
 	#define UBRR0H UBRRH
 	#define SIG_UART0_DATA SIG_UART_DATA
 	#define SIG_UART0_RECV SIG_UART_RECV
+	#define SIG_UART0_TRANS SIG_UART_TRANS
 #elif CPU_AVR_ATMEGA103
 	#define AVR_HAS_UART1 0
 	#define UCSR0B UCR
@@ -255,6 +338,7 @@
 	#define UBRR0L UBRR
 	#define SIG_UART0_DATA SIG_UART_DATA
 	#define SIG_UART0_RECV SIG_UART_RECV
+	#define SIG_UART0_TRANS SIG_UART_TRANS
 #else
 	#error Unknown architecture
 #endif
@@ -332,13 +416,16 @@ struct Serial *ser_spi = &ser_handles[SER_SPI];
 /*
  * Callbacks
  */
-static void uart0_init(UNUSED(struct SerialHardware *, _hw), UNUSED(struct Serial *, ser))
+static void uart0_init(
+	UNUSED_ARG(struct SerialHardware *, _hw),
+	UNUSED_ARG(struct Serial *, ser))
 {
 	SER_UART0_BUS_TXINIT;
 	RTS_ON;
+	SER_STROBE_INIT;
 }
 
-static void uart0_cleanup(UNUSED(struct SerialHardware *, _hw))
+static void uart0_cleanup(UNUSED_ARG(struct SerialHardware *, _hw))
 {
 	UCSR0B = 0;
 }
@@ -359,12 +446,12 @@ static void uart0_enabletxirq(struct SerialHardware *_hw)
 	}
 }
 
-static void uart0_setbaudrate(UNUSED(struct SerialHardware *, _hw), unsigned long rate)
+static void uart0_setbaudrate(UNUSED_ARG(struct SerialHardware *, _hw), unsigned long rate)
 {
 	/* Compute baud-rate period */
 	uint16_t period = (((CLOCK_FREQ / 16UL) + (rate / 2)) / rate) - 1;
 
-#ifndef __AVR_ATmega103__
+#if !CPU_AVR_ATMEGA103
 	UBRR0H = (period) >> 8;
 #endif
 	UBRR0L = (period);
@@ -372,7 +459,7 @@ static void uart0_setbaudrate(UNUSED(struct SerialHardware *, _hw), unsigned lon
 	//DB(kprintf("uart0_setbaudrate(rate=%lu): period=%d\n", rate, period);)
 }
 
-static void uart0_setparity(UNUSED(struct SerialHardware *, _hw), int parity)
+static void uart0_setparity(UNUSED_ARG(struct SerialHardware *, _hw), int parity)
 {
 #if !CPU_AVR_ATMEGA103
 	UCSR0C = (UCSR0C & ~(BV(UPM1) | BV(UPM0))) | ((parity) << UPM0);
@@ -381,14 +468,16 @@ static void uart0_setparity(UNUSED(struct SerialHardware *, _hw), int parity)
 
 #if AVR_HAS_UART1
 
-static void uart1_init(UNUSED(struct SerialHardware *, _hw), UNUSED(struct Serial *, ser))
+static void uart1_init(
+	UNUSED_ARG(struct SerialHardware *, _hw),
+	UNUSED_ARG(struct Serial *, ser))
 {
 	SER_UART1_BUS_TXINIT;
 	RTS_ON;
 	SER_STROBE_INIT;
 }
 
-static void uart1_cleanup(UNUSED(struct SerialHardware *, _hw))
+static void uart1_cleanup(UNUSED_ARG(struct SerialHardware *, _hw))
 {
 	UCSR1B = 0;
 }
@@ -410,7 +499,7 @@ static void uart1_enabletxirq(struct SerialHardware *_hw)
 	}
 }
 
-static void uart1_setbaudrate(UNUSED(struct SerialHardware *, _hw), unsigned long rate)
+static void uart1_setbaudrate(UNUSED_ARG(struct SerialHardware *, _hw), unsigned long rate)
 {
 	/* Compute baud-rate period */
 	uint16_t period = (((CLOCK_FREQ / 16UL) + (rate / 2)) / rate) - 1;
@@ -421,14 +510,14 @@ static void uart1_setbaudrate(UNUSED(struct SerialHardware *, _hw), unsigned lon
 	//DB(kprintf("uart1_setbaudrate(rate=%ld): period=%d\n", rate, period);)
 }
 
-static void uart1_setparity(UNUSED(struct SerialHardware *, _hw), int parity)
+static void uart1_setparity(UNUSED_ARG(struct SerialHardware *, _hw), int parity)
 {
 	UCSR1C = (UCSR1C & ~(BV(UPM1) | BV(UPM0))) | ((parity) << UPM0);
 }
 
 #endif // AVR_HAS_UART1
 
-static void spi_init(UNUSED(struct SerialHardware *, _hw), UNUSED(struct Serial *, ser))
+static void spi_init(UNUSED_ARG(struct SerialHardware *, _hw), UNUSED_ARG(struct Serial *, ser))
 {
 	/*
 	 * Set MOSI and SCK ports out, MISO in.
@@ -447,11 +536,18 @@ static void spi_init(UNUSED(struct SerialHardware *, _hw), UNUSED(struct Serial
 	SPI_DDR &= ~BV(SPI_MISO_BIT);
 	/* Enable SPI, IRQ on, Master, CPU_CLOCK/16 */
 	SPCR = BV(SPE) | BV(SPIE) | BV(MSTR) | BV(SPR0);
+
+	SER_SPI_BUS_TXINIT;
+
+	SER_STROBE_INIT;
 }
 
-static void spi_cleanup(UNUSED(struct SerialHardware *, _hw))
+static void spi_cleanup(UNUSED_ARG(struct SerialHardware *, _hw))
 {
 	SPCR = 0;
+
+	SER_SPI_BUS_TXCLOSE;
+
 	/* Set all pins as inputs */
 	SPI_DDR &= ~(BV(SPI_MISO_BIT) | BV(SPI_MOSI_BIT) | BV(SPI_SCK_BIT));
 }
@@ -461,7 +557,7 @@ static void spi_starttx(struct SerialHardware *_hw)
 	struct AvrSerial *hw = (struct AvrSerial *)_hw;
 
 	cpuflags_t flags;
-	DISABLE_IRQSAVE(flags);
+	IRQ_SAVE_DISABLE(flags);
 
 	/* Send data only if the SPI is not already transmitting */
 	if (!hw->sending && !fifo_isempty(&ser_spi->txfifo))
@@ -470,19 +566,28 @@ static void spi_starttx(struct SerialHardware *_hw)
 		SPDR = fifo_pop(&ser_spi->txfifo);
 	}
 
-	ENABLE_IRQRESTORE(flags);
+	IRQ_RESTORE(flags);
 }
 
-static void spi_setbaudrate(UNUSED(struct SerialHardware *, _hw), UNUSED(unsigned long, rate))
+static void spi_setbaudrate(
+	UNUSED_ARG(struct SerialHardware *, _hw),
+	UNUSED_ARG(unsigned long, rate))
 {
 	// nop
 }
 
-static void spi_setparity(UNUSED(struct SerialHardware *, _hw), UNUSED(int, parity))
+static void spi_setparity(UNUSED_ARG(struct SerialHardware *, _hw), UNUSED_ARG(int, parity))
 {
 	// nop
 }
 
+static bool tx_sending(struct SerialHardware* _hw)
+{
+	struct AvrSerial *hw = (struct AvrSerial *)_hw;
+	return hw->sending;
+}
+
+
 
 // FIXME: move into compiler.h?  Ditch?
 #if COMPILER_C99
@@ -501,9 +606,10 @@ static const struct SerialHardwareVT UART0_VT =
 {
 	C99INIT(init, uart0_init),
 	C99INIT(cleanup, uart0_cleanup),
-	C99INIT(setbaudrate, uart0_setbaudrate),
-	C99INIT(setparity, uart0_setparity),
-	C99INIT(enabletxirq, uart0_enabletxirq),
+	C99INIT(setBaudrate, uart0_setbaudrate),
+	C99INIT(setParity, uart0_setparity),
+	C99INIT(txStart, uart0_enabletxirq),
+	C99INIT(txSending, tx_sending),
 };
 
 #if AVR_HAS_UART1
@@ -511,9 +617,10 @@ static const struct SerialHardwareVT UART1_VT =
 {
 	C99INIT(init, uart1_init),
 	C99INIT(cleanup, uart1_cleanup),
-	C99INIT(setbaudrate, uart1_setbaudrate),
-	C99INIT(setparity, uart1_setparity),
-	C99INIT(enabletxirq, uart1_enabletxirq),
+	C99INIT(setBaudrate, uart1_setbaudrate),
+	C99INIT(setParity, uart1_setparity),
+	C99INIT(txStart, uart1_enabletxirq),
+	C99INIT(txSending, tx_sending),
 };
 #endif // AVR_HAS_UART1
 
@@ -521,9 +628,10 @@ static const struct SerialHardwareVT SPI_VT =
 {
 	C99INIT(init, spi_init),
 	C99INIT(cleanup, spi_cleanup),
-	C99INIT(setbaudrate, spi_setbaudrate),
-	C99INIT(setparity, spi_setparity),
-	C99INIT(enabletxirq, spi_starttx),
+	C99INIT(setBaudrate, spi_setbaudrate),
+	C99INIT(setParity, spi_setparity),
+	C99INIT(txStart, spi_starttx),
+	C99INIT(txSending, tx_sending),
 };
 
 static struct AvrSerial UARTDescs[SER_CNT] =
@@ -562,7 +670,7 @@ static struct AvrSerial UARTDescs[SER_CNT] =
 	}
 };
 
-struct SerialHardware* ser_hw_getdesc(int unit)
+struct SerialHardware *ser_hw_getdesc(int unit)
 {
 	ASSERT(unit < SER_CNT);
 	return &UARTDescs[unit].hw;
@@ -580,7 +688,7 @@ SIGNAL(SIG_CTS)
 {
 	// Re-enable UDR empty interrupt and TX, then disable CTS interrupt
 	UCSR0B = BV(RXCIE) | BV(UDRIE) | BV(RXEN) | BV(TXEN);
-	cbi(EIMSK, EIMSKB_CTS);
+	EIMSK &= ~EIMSKF_CTS;
 }
 
 #endif // CONFIG_SER_HWHANDSHAKE
@@ -608,8 +716,8 @@ SIGNAL(SIG_UART0_DATA)
 		// Disable rx interrupt and tx, enable CTS interrupt
 		// UNTESTED
 		UCSR0B = BV(RXCIE) | BV(RXEN) | BV(TXEN);
-		sbi(EIFR, EIMSKB_CTS);
-		sbi(EIMSK, EIMSKB_CTS);
+		EIFR |= EIMSKF_CTS;
+		EIMSK |= EIMSKF_CTS;
 	}
 #endif
 	else
@@ -679,8 +787,8 @@ SIGNAL(SIG_UART1_DATA)
 		// Disable rx interrupt and tx, enable CTS interrupt
 		// UNTESTED
 		UCSR1B = BV(RXCIE) | BV(RXEN) | BV(TXEN);
-		sbi(EIFR, EIMSKB_CTS);
-		sbi(EIMSK, EIMSKB_CTS);
+		EIFR |= EIMSKF_CTS;
+		EIMSK |= EIMSKF_CTS;
 	}
 #endif
 	else
@@ -739,7 +847,7 @@ SIGNAL(SIG_UART0_RECV)
 
 	/* Disable Recv complete IRQ */
 	//UCSR0B &= ~BV(RXCIE);
-	//ENABLE_INTS;
+	//IRQ_ENABLE;
 
 	/* Should be read before UDR */
 	ser_uart0->status |= UCSR0A & (SERRF_RXSROVERRUN | SERRF_FRAMEERROR);
@@ -763,7 +871,7 @@ SIGNAL(SIG_UART0_RECV)
 	}
 
 	/* Reenable receive complete int */
-	//DISABLE_INTS;
+	//IRQ_DISABLE;
 	//UCSR0B |= BV(RXCIE);
 
 	SER_STROBE_OFF;
@@ -789,7 +897,7 @@ SIGNAL(SIG_UART1_RECV)
 
 	/* Disable Recv complete IRQ */
 	//UCSR1B &= ~BV(RXCIE);
-	//ENABLE_INTS;
+	//IRQ_ENABLE;
 
 	/* Should be read before UDR */
 	ser_uart1->status |= UCSR1A & (SERRF_RXSROVERRUN | SERRF_FRAMEERROR);
@@ -812,6 +920,7 @@ SIGNAL(SIG_UART1_RECV)
 #endif
 	}
 	/* Re-enable receive complete int */
+	//IRQ_DISABLE;
 	//UCSR1B |= BV(RXCIE);
 
 	SER_STROBE_OFF;
@@ -825,6 +934,8 @@ SIGNAL(SIG_UART1_RECV)
  */
 SIGNAL(SIG_SPI)
 {
+	SER_STROBE_ON;
+
 	/* Read incoming byte. */
 	if (!fifo_isfull(&ser_spi->rxfifo))
 		fifo_push(&ser_spi->rxfifo, SPDR);
@@ -839,4 +950,6 @@ SIGNAL(SIG_SPI)
 		SPDR = fifo_pop(&ser_spi->txfifo);
 	else
 		UARTDescs[SER_SPI].sending = false;
+
+	SER_STROBE_OFF;
 }