X-Git-Url: https://codewiz.org/gitweb?a=blobdiff_plain;f=drv%2Fser_avr.c;h=90d81fc429a4518bb213d897a21f52e0e819ab68;hb=a98a42143f3b9c130a36e59221817fa5260a8322;hp=0cfb59e20469ce9a6fa86fba115aeffdeb7139ac;hpb=1f56a4bfc61387a3013cbd1fe4379ab552c603cd;p=bertos.git diff --git a/drv/ser_avr.c b/drv/ser_avr.c index 0cfb59e2..90d81fc4 100755 --- a/drv/ser_avr.c +++ b/drv/ser_avr.c @@ -3,7 +3,7 @@ * * * \brief AVR UART and SPI I/O driver @@ -38,6 +38,24 @@ /*#* *#* $Log$ + *#* Revision 1.29 2005/11/27 23:31:48 bernie + *#* Support avr-libc 1.4. + *#* + *#* Revision 1.28 2005/11/04 16:20:02 bernie + *#* Fix reference to README.devlib in header. + *#* + *#* Revision 1.27 2005/07/03 15:19:31 bernie + *#* Doxygen fix. + *#* + *#* Revision 1.26 2005/04/11 19:10:27 bernie + *#* Include top-level headers from cfg/ subdir. + *#* + *#* Revision 1.25 2005/01/25 08:37:26 bernie + *#* CONFIG_SER_HWHANDSHAKE fixes. + *#* + *#* Revision 1.24 2005/01/14 00:49:16 aleph + *#* Rename callbacks; SerialHardwareVT.txSending: New callback; Add SPI_BUS macros. + *#* *#* Revision 1.23 2005/01/11 18:09:07 aleph *#* Add ATmega8 SPI port definitions; Fix transmit complete IRQ bug; add strobe macros to uart1 and spi *#* @@ -105,34 +123,32 @@ #include "ser.h" #include "ser_p.h" -#include "config.h" #include "hw.h" /* Required for bus macros overrides */ +#include -#include +#include #include #include -#include #include +#if defined(__AVR_LIBC_VERSION__) && (__AVR_LIBC_VERSION__ >= 10400UL) + #include +#else + #include +#endif -/*! - * \name Hardware handshake (RTS/CTS). - * \{ - */ -#ifndef RTS_ON -#define RTS_ON do {} while (0) -#endif -#ifndef RTS_OFF -#define RTS_OFF do {} while (0) -#endif -#ifndef IS_CTS_ON -#define IS_CTS_ON true -#endif -#ifndef EIMSKB_CTS -#define EIMSKB_CTS 0 /*!< Dummy value, must be overridden */ +#if !CONFIG_SER_HWHANDSHAKE + /*! + * \name Hardware handshake (RTS/CTS). + * \{ + */ + #define RTS_ON do {} while (0) + #define RTS_OFF do {} while (0) + #define IS_CTS_ON true + #define EIMSKF_CTS 0 /*!< Dummy value, must be overridden */ + /*\}*/ #endif -/*\}*/ /*! @@ -251,6 +267,32 @@ /*\}*/ +/*! + * \name Overridable SPI hooks + * + * These can be redefined in hw.h to implement + * special bus policies such as slave select pin handling, etc. + * + * \{ + */ +#ifndef SER_SPI_BUS_TXINIT + /*! + * Default TXINIT macro - invoked in spi_init() + * The default is no action. + */ + #define SER_SPI_BUS_TXINIT +#endif + +#ifndef SER_SPI_BUS_TXCLOSE + /*! + * Invoked after the last character has been transmitted. + * The default is no action. + */ + #define SER_SPI_BUS_TXCLOSE +#endif +/*\}*/ + + /* SPI port and pin configuration */ #if CPU_AVR_ATMEGA64 || CPU_AVR_ATMEGA128 || CPU_AVR_ATMEGA103 #define SPI_PORT PORTB @@ -403,7 +445,7 @@ static void uart0_setbaudrate(UNUSED_ARG(struct SerialHardware *, _hw), unsigned /* Compute baud-rate period */ uint16_t period = (((CLOCK_FREQ / 16UL) + (rate / 2)) / rate) - 1; -#ifndef __AVR_ATmega103__ +#if !CPU_AVR_ATMEGA103 UBRR0H = (period) >> 8; #endif UBRR0L = (period); @@ -489,12 +531,17 @@ static void spi_init(UNUSED_ARG(struct SerialHardware *, _hw), UNUSED_ARG(struct /* Enable SPI, IRQ on, Master, CPU_CLOCK/16 */ SPCR = BV(SPE) | BV(SPIE) | BV(MSTR) | BV(SPR0); + SER_SPI_BUS_TXINIT; + SER_STROBE_INIT; } static void spi_cleanup(UNUSED_ARG(struct SerialHardware *, _hw)) { SPCR = 0; + + SER_SPI_BUS_TXCLOSE; + /* Set all pins as inputs */ SPI_DDR &= ~(BV(SPI_MISO_BIT) | BV(SPI_MOSI_BIT) | BV(SPI_SCK_BIT)); } @@ -528,6 +575,13 @@ static void spi_setparity(UNUSED_ARG(struct SerialHardware *, _hw), UNUSED_ARG(i // nop } +static bool tx_sending(struct SerialHardware* _hw) +{ + struct AvrSerial *hw = (struct AvrSerial *)_hw; + return hw->sending; +} + + // FIXME: move into compiler.h? Ditch? #if COMPILER_C99 @@ -546,9 +600,10 @@ static const struct SerialHardwareVT UART0_VT = { C99INIT(init, uart0_init), C99INIT(cleanup, uart0_cleanup), - C99INIT(setbaudrate, uart0_setbaudrate), - C99INIT(setparity, uart0_setparity), - C99INIT(enabletxirq, uart0_enabletxirq), + C99INIT(setBaudrate, uart0_setbaudrate), + C99INIT(setParity, uart0_setparity), + C99INIT(txStart, uart0_enabletxirq), + C99INIT(txSending, tx_sending), }; #if AVR_HAS_UART1 @@ -556,9 +611,10 @@ static const struct SerialHardwareVT UART1_VT = { C99INIT(init, uart1_init), C99INIT(cleanup, uart1_cleanup), - C99INIT(setbaudrate, uart1_setbaudrate), - C99INIT(setparity, uart1_setparity), - C99INIT(enabletxirq, uart1_enabletxirq), + C99INIT(setBaudrate, uart1_setbaudrate), + C99INIT(setParity, uart1_setparity), + C99INIT(txStart, uart1_enabletxirq), + C99INIT(txSending, tx_sending), }; #endif // AVR_HAS_UART1 @@ -566,9 +622,10 @@ static const struct SerialHardwareVT SPI_VT = { C99INIT(init, spi_init), C99INIT(cleanup, spi_cleanup), - C99INIT(setbaudrate, spi_setbaudrate), - C99INIT(setparity, spi_setparity), - C99INIT(enabletxirq, spi_starttx), + C99INIT(setBaudrate, spi_setbaudrate), + C99INIT(setParity, spi_setparity), + C99INIT(txStart, spi_starttx), + C99INIT(txSending, tx_sending), }; static struct AvrSerial UARTDescs[SER_CNT] = @@ -625,7 +682,7 @@ SIGNAL(SIG_CTS) { // Re-enable UDR empty interrupt and TX, then disable CTS interrupt UCSR0B = BV(RXCIE) | BV(UDRIE) | BV(RXEN) | BV(TXEN); - cbi(EIMSK, EIMSKB_CTS); + EIMSK &= ~EIMSKF_CTS; } #endif // CONFIG_SER_HWHANDSHAKE @@ -653,8 +710,8 @@ SIGNAL(SIG_UART0_DATA) // Disable rx interrupt and tx, enable CTS interrupt // UNTESTED UCSR0B = BV(RXCIE) | BV(RXEN) | BV(TXEN); - sbi(EIFR, EIMSKB_CTS); - sbi(EIMSK, EIMSKB_CTS); + EIFR |= EIMSKF_CTS; + EIMSK |= EIMSKF_CTS; } #endif else @@ -724,8 +781,8 @@ SIGNAL(SIG_UART1_DATA) // Disable rx interrupt and tx, enable CTS interrupt // UNTESTED UCSR1B = BV(RXCIE) | BV(RXEN) | BV(TXEN); - sbi(EIFR, EIMSKB_CTS); - sbi(EIMSK, EIMSKB_CTS); + EIFR |= EIMSKF_CTS; + EIMSK |= EIMSKF_CTS; } #endif else