X-Git-Url: https://codewiz.org/gitweb?a=blobdiff_plain;f=drv%2Fser_avr.c;h=dba54b0c3d571fe4062d953b7f6b4f2639d51f48;hb=ffd018661b93d258df699ee4e86d0f2f1cccba4e;hp=aa239de4af9f038426fca84fccfbcc7b0c25c013;hpb=8940ced6ca2c4d2efb74cbdbfbdd033e0adf9200;p=bertos.git diff --git a/drv/ser_avr.c b/drv/ser_avr.c index aa239de4..dba54b0c 100755 --- a/drv/ser_avr.c +++ b/drv/ser_avr.c @@ -1,9 +1,9 @@ -/*! +/** * \file * * * \brief AVR UART and SPI I/O driver @@ -38,6 +38,30 @@ /*#* *#* $Log$ + *#* Revision 1.32 2006/07/19 12:56:26 bernie + *#* Convert to new Doxygen style. + *#* + *#* Revision 1.31 2006/05/18 00:37:29 bernie + *#* Use hw_ser.h instead of ubiquitous hw.h. + *#* + *#* Revision 1.30 2006/02/17 22:23:06 bernie + *#* Update POSIX serial emulator. + *#* + *#* Revision 1.29 2005/11/27 23:31:48 bernie + *#* Support avr-libc 1.4. + *#* + *#* Revision 1.28 2005/11/04 16:20:02 bernie + *#* Fix reference to README.devlib in header. + *#* + *#* Revision 1.27 2005/07/03 15:19:31 bernie + *#* Doxygen fix. + *#* + *#* Revision 1.26 2005/04/11 19:10:27 bernie + *#* Include top-level headers from cfg/ subdir. + *#* + *#* Revision 1.25 2005/01/25 08:37:26 bernie + *#* CONFIG_SER_HWHANDSHAKE fixes. + *#* *#* Revision 1.24 2005/01/14 00:49:16 aleph *#* Rename callbacks; SerialHardwareVT.txSending: New callback; Add SPI_BUS macros. *#* @@ -108,37 +132,35 @@ #include "ser.h" #include "ser_p.h" -#include "config.h" -#include "hw.h" /* Required for bus macros overrides */ +#include "hw_ser.h" /* Required for bus macros overrides */ +#include -#include +#include #include #include -#include #include +#if defined(__AVR_LIBC_VERSION__) && (__AVR_LIBC_VERSION__ >= 10400UL) + #include +#else + #include +#endif -/*! - * \name Hardware handshake (RTS/CTS). - * \{ - */ -#ifndef RTS_ON -#define RTS_ON do {} while (0) -#endif -#ifndef RTS_OFF -#define RTS_OFF do {} while (0) -#endif -#ifndef IS_CTS_ON -#define IS_CTS_ON true -#endif -#ifndef EIMSKB_CTS -#define EIMSKB_CTS 0 /*!< Dummy value, must be overridden */ +#if !CONFIG_SER_HWHANDSHAKE + /** + * \name Hardware handshake (RTS/CTS). + * \{ + */ + #define RTS_ON do {} while (0) + #define RTS_OFF do {} while (0) + #define IS_CTS_ON true + #define EIMSKF_CTS 0 /**< Dummy value, must be overridden */ + /*\}*/ #endif -/*\}*/ -/*! +/** * \name Overridable serial bus hooks * * These can be redefined in hw.h to implement @@ -159,7 +181,7 @@ * \{ */ #ifndef SER_UART0_BUS_TXINIT - /*! + /** * Default TXINIT macro - invoked in uart0_init() * * - Enable both the receiver and the transmitter @@ -171,7 +193,7 @@ #endif #ifndef SER_UART0_BUS_TXBEGIN - /*! + /** * Invoked before starting a transmission * * - Enable both the receiver and the transmitter @@ -183,7 +205,7 @@ #endif #ifndef SER_UART0_BUS_TXCHAR - /*! + /** * Invoked to send one character. */ #define SER_UART0_BUS_TXCHAR(c) do { \ @@ -192,7 +214,7 @@ #endif #ifndef SER_UART0_BUS_TXEND - /*! + /** * Invoked as soon as the txfifo becomes empty * * - Keep both the receiver and the transmitter enabled @@ -205,7 +227,7 @@ #endif #ifndef SER_UART0_BUS_TXOFF - /*! + /** * \def SER_UART0_BUS_TXOFF * * Invoked after the last character has been transmitted @@ -218,31 +240,31 @@ #endif #ifndef SER_UART1_BUS_TXINIT - /*! \sa SER_UART0_BUS_TXINIT */ + /** \sa SER_UART0_BUS_TXINIT */ #define SER_UART1_BUS_TXINIT do { \ UCSR1B = BV(RXCIE) | BV(RXEN) | BV(TXEN); \ } while (0) #endif #ifndef SER_UART1_BUS_TXBEGIN - /*! \sa SER_UART0_BUS_TXBEGIN */ + /** \sa SER_UART0_BUS_TXBEGIN */ #define SER_UART1_BUS_TXBEGIN do { \ UCSR1B = BV(RXCIE) | BV(UDRIE) | BV(RXEN) | BV(TXEN); \ } while (0) #endif #ifndef SER_UART1_BUS_TXCHAR - /*! \sa SER_UART0_BUS_TXCHAR */ + /** \sa SER_UART0_BUS_TXCHAR */ #define SER_UART1_BUS_TXCHAR(c) do { \ UDR1 = (c); \ } while (0) #endif #ifndef SER_UART1_BUS_TXEND - /*! \sa SER_UART0_BUS_TXEND */ + /** \sa SER_UART0_BUS_TXEND */ #define SER_UART1_BUS_TXEND do { \ UCSR1B = BV(RXCIE) | BV(RXEN) | BV(TXEN); \ } while (0) #endif #ifndef SER_UART1_BUS_TXOFF - /*! + /** * \def SER_UART1_BUS_TXOFF * * \see SER_UART0_BUS_TXOFF @@ -254,7 +276,7 @@ /*\}*/ -/*! +/** * \name Overridable SPI hooks * * These can be redefined in hw.h to implement @@ -263,9 +285,7 @@ * \{ */ #ifndef SER_SPI_BUS_TXINIT - /*! - * \def SER_SPI_BUS_TXINIT - * + /** * Default TXINIT macro - invoked in spi_init() * The default is no action. */ @@ -273,9 +293,7 @@ #endif #ifndef SER_SPI_BUS_TXCLOSE - /*! - * \def SER_SPI_BUS_TXCLOSE - * + /** * Invoked after the last character has been transmitted. * The default is no action. */ @@ -329,7 +347,7 @@ #endif -/*! +/** * \def CONFIG_SER_STROBE * * This is a debug facility that can be used to @@ -360,7 +378,7 @@ static unsigned char spi_txbuffer[CONFIG_SPI_TXBUFSIZE]; static unsigned char spi_rxbuffer[CONFIG_SPI_RXBUFSIZE]; -/*! +/** * Internal hardware state structure * * The \a sending variable is true while the transmission @@ -436,7 +454,7 @@ static void uart0_setbaudrate(UNUSED_ARG(struct SerialHardware *, _hw), unsigned /* Compute baud-rate period */ uint16_t period = (((CLOCK_FREQ / 16UL) + (rate / 2)) / rate) - 1; -#ifndef __AVR_ATmega103__ +#if !CPU_AVR_ATMEGA103 UBRR0H = (period) >> 8; #endif UBRR0L = (period); @@ -655,7 +673,7 @@ static struct AvrSerial UARTDescs[SER_CNT] = } }; -struct SerialHardware* ser_hw_getdesc(int unit) +struct SerialHardware *ser_hw_getdesc(int unit) { ASSERT(unit < SER_CNT); return &UARTDescs[unit].hw; @@ -668,18 +686,18 @@ struct SerialHardware* ser_hw_getdesc(int unit) #if CONFIG_SER_HWHANDSHAKE -//! This interrupt is triggered when the CTS line goes high +/// This interrupt is triggered when the CTS line goes high SIGNAL(SIG_CTS) { // Re-enable UDR empty interrupt and TX, then disable CTS interrupt UCSR0B = BV(RXCIE) | BV(UDRIE) | BV(RXEN) | BV(TXEN); - cbi(EIMSK, EIMSKB_CTS); + EIMSK &= ~EIMSKF_CTS; } #endif // CONFIG_SER_HWHANDSHAKE -/*! +/** * Serial 0 TX interrupt handler */ SIGNAL(SIG_UART0_DATA) @@ -701,8 +719,8 @@ SIGNAL(SIG_UART0_DATA) // Disable rx interrupt and tx, enable CTS interrupt // UNTESTED UCSR0B = BV(RXCIE) | BV(RXEN) | BV(TXEN); - sbi(EIFR, EIMSKB_CTS); - sbi(EIMSK, EIMSKB_CTS); + EIFR |= EIMSKF_CTS; + EIMSK |= EIMSKF_CTS; } #endif else @@ -715,7 +733,7 @@ SIGNAL(SIG_UART0_DATA) } #ifdef SER_UART0_BUS_TXOFF -/*! +/** * Serial port 0 TX complete interrupt handler. * * This IRQ is usually disabled. The UDR-empty interrupt @@ -750,7 +768,7 @@ SIGNAL(SIG_UART0_TRANS) #if AVR_HAS_UART1 -/*! +/** * Serial 1 TX interrupt handler */ SIGNAL(SIG_UART1_DATA) @@ -772,8 +790,8 @@ SIGNAL(SIG_UART1_DATA) // Disable rx interrupt and tx, enable CTS interrupt // UNTESTED UCSR1B = BV(RXCIE) | BV(RXEN) | BV(TXEN); - sbi(EIFR, EIMSKB_CTS); - sbi(EIMSK, EIMSKB_CTS); + EIFR |= EIMSKF_CTS; + EIMSK |= EIMSKF_CTS; } #endif else @@ -786,7 +804,7 @@ SIGNAL(SIG_UART1_DATA) } #ifdef SER_UART1_BUS_TXOFF -/*! +/** * Serial port 1 TX complete interrupt handler. * * \sa port 0 TX complete handler. @@ -811,7 +829,7 @@ SIGNAL(SIG_UART1_TRANS) #endif // AVR_HAS_UART1 -/*! +/** * Serial 0 RX complete interrupt handler. * * This handler is interruptible. @@ -865,7 +883,7 @@ SIGNAL(SIG_UART0_RECV) #if AVR_HAS_UART1 -/*! +/** * Serial 1 RX complete interrupt handler. * * This handler is interruptible. @@ -914,7 +932,7 @@ SIGNAL(SIG_UART1_RECV) #endif // AVR_HAS_UART1 -/*! +/** * SPI interrupt handler */ SIGNAL(SIG_SPI)