X-Git-Url: https://codewiz.org/gitweb?a=blobdiff_plain;f=drv%2Fser_dsp56k.c;h=ce865b996ad8c1943b07e568404b22645b0c9f59;hb=5f3952176a4e9a00ca8dd5ec4a6b994958f89e0a;hp=d2f1362041180fbed8d63d242a369dad190ca174;hpb=0375780817109b6ab5cd4f36ccf80650b2fe77d5;p=bertos.git diff --git a/drv/ser_dsp56k.c b/drv/ser_dsp56k.c old mode 100755 new mode 100644 index d2f13620..ce865b99 --- a/drv/ser_dsp56k.c +++ b/drv/ser_dsp56k.c @@ -1,25 +1,72 @@ /** * \file - * Copyright (C) 2003 Develer S.r.l. (http://www.develer.com/) - * All Rights Reserved. + * * * \version $Id$ * * \author Stefano Fedrigo + * \author Giovanni Bajo * * \brief DSP5680x CPU specific serial I/O driver */ -#include -#include -#include +/*#* + *#* $Log$ + *#* Revision 1.14 2006/07/19 12:56:26 bernie + *#* Convert to new Doxygen style. + *#* + *#* Revision 1.13 2005/11/04 16:20:02 bernie + *#* Fix reference to README.devlib in header. + *#* + *#* Revision 1.12 2005/04/11 19:10:27 bernie + *#* Include top-level headers from cfg/ subdir. + *#* + *#* Revision 1.11 2005/01/25 07:42:04 bernie + *#* Simplify. + *#* + *#* Revision 1.10 2005/01/14 00:48:33 aleph + *#* Rename callbacks; SerialHardwareVT.txSending: New callback. + *#* + *#* Revision 1.9 2004/12/08 09:42:55 bernie + *#* Add support for multiplexed serial ports. + *#* + *#* Revision 1.8 2004/10/26 09:00:49 bernie + *#* Don't access serial data register twice. + *#* + *#* Revision 1.7 2004/10/19 08:57:15 bernie + *#* Bugfixes for DSP56K serial driver from scfirm. + *#* + *#* Revision 1.5 2004/08/25 14:12:08 rasky + *#* Aggiornato il comment block dei log RCS + *#* + *#* Revision 1.4 2004/07/30 14:27:49 rasky + *#* Aggiornati alcuni file DSP56k per la nuova libreria di IRQ management + *#* + *#* Revision 1.3 2004/06/03 11:27:09 bernie + *#* Add dual-license information. + *#* + *#* Revision 1.2 2004/05/23 18:21:53 bernie + *#* Trim CVS logs and cleanup header info. + *#*/ + #include "ser.h" #include "ser_p.h" +#include +#include +#include +#include // GPIO E is shared with SPI (in DSP56807). Pins 0&1 are TXD0 and RXD0. To use // the serial, we need to disable the GPIO functions on them. -#define REG_GPIO_SERIAL REG_GPIO_E -#define REG_GPIO_SERIAL_MASK 0x3 +#define REG_GPIO_SERIAL_0 REG_GPIO_E +#define REG_GPIO_SERIAL_MASK_0 0x03 + +#define REG_GPIO_SERIAL_1 REG_GPIO_D +#define REG_GPIO_SERIAL_MASK_1 0xC0 + // Check flag consistency #if (SERRF_PARITYERROR != REG_SCI_SR_PF) || \ @@ -29,16 +76,31 @@ #error error flags do not match with register bits #endif +static unsigned char ser0_fifo_rx[CONFIG_SER0_FIFOSIZE_RX]; +static unsigned char ser0_fifo_tx[CONFIG_SER0_FIFOSIZE_TX]; +static unsigned char ser1_fifo_rx[CONFIG_SER1_FIFOSIZE_RX]; +static unsigned char ser1_fifo_tx[CONFIG_SER1_FIFOSIZE_TX]; + +#if CONFIG_SER_MULTI + #include + + #define MAX_MULTI_GROUPS 1 + + struct Semaphore multi_sems[MAX_MULTI_GROUPS]; +#endif + + struct SCI { struct SerialHardware hw; struct Serial* serial; volatile struct REG_SCI_STRUCT* regs; - uint16_t irq_tx; - uint16_t irq_rx; + IRQ_VECTOR irq_tx; + IRQ_VECTOR irq_rx; + int num_group; + int id; }; - static inline void enable_tx_irq_bare(volatile struct REG_SCI_STRUCT* regs) { regs->CR |= REG_SCI_CR_TEIE | REG_SCI_CR_TIIE; @@ -46,7 +108,7 @@ static inline void enable_tx_irq_bare(volatile struct REG_SCI_STRUCT* regs) static inline void enable_rx_irq_bare(volatile struct REG_SCI_STRUCT* regs) { - regs->CR |= REG_SCI_CR_RIE | REG_SCI_CR_REIE; + regs->CR |= REG_SCI_CR_RIE; } static inline void disable_tx_irq_bare(volatile struct REG_SCI_STRUCT* regs) @@ -62,29 +124,41 @@ static inline void disable_rx_irq_bare(volatile struct REG_SCI_STRUCT* regs) static inline void disable_tx_irq(struct SerialHardware* _hw) { struct SCI* hw = (struct SCI*)_hw; - volatile struct REG_SCI_STRUCT* regs = hw->regs; - disable_tx_irq_bare(regs); + disable_tx_irq_bare(hw->regs); +} + +static inline void disable_rx_irq(struct SerialHardware* _hw) +{ + struct SCI* hw = (struct SCI*)_hw; + + disable_rx_irq_bare(hw->regs); } static inline void enable_tx_irq(struct SerialHardware* _hw) { struct SCI* hw = (struct SCI*)_hw; - volatile struct REG_SCI_STRUCT* regs = hw->regs; - enable_tx_irq_bare(regs); + enable_tx_irq_bare(hw->regs); } static inline void enable_rx_irq(struct SerialHardware* _hw) { struct SCI* hw = (struct SCI*)_hw; - volatile struct REG_SCI_STRUCT* regs = hw->regs; - enable_rx_irq_bare(regs); + enable_rx_irq_bare(hw->regs); } -INLINE void tx_isr(struct SCI *hw) +static inline bool tx_irq_enabled(struct SerialHardware* _hw) { + struct SCI* hw = (struct SCI*)_hw; + + return (hw->regs->CR & REG_SCI_CR_TEIE); +} + +static void tx_isr(const struct SCI *hw) +{ +#pragma interrupt warn volatile struct REG_SCI_STRUCT* regs = hw->regs; if (fifo_isempty(&hw->serial->txfifo)) @@ -97,22 +171,34 @@ INLINE void tx_isr(struct SCI *hw) } } -INLINE void rx_isr(struct SCI *hw) +static void rx_isr(const struct SCI *hw) { +#pragma interrupt warn volatile struct REG_SCI_STRUCT* regs = hw->regs; - hw->serial->status |= regs->SR & (SERRF_PARITYERROR | - SERRF_RXSROVERRUN | - SERRF_FRAMEERROR | + // Propagate errors + hw->serial->status |= regs->SR & (SERRF_PARITYERROR | + SERRF_RXSROVERRUN | + SERRF_FRAMEERROR | SERRF_NOISEERROR); - - if (fifo_isfull(&hw->serial->rxfifo)) - hw->serial->status |= SERRF_RXFIFOOVERRUN; - else - fifo_push(&hw->serial->rxfifo, regs->DR); - - // Writing anything to the status register clear the - // error bits. + + /* + * Serial IRQ can happen for two reason: data ready (RDRF) or overrun (OR) + * If the data is ready, we need to fetch it from the data register or + * the interrupt will retrigger immediatly. In case of overrun, instead, + * the value of the data register is meaningless. + */ + if (regs->SR & REG_SCI_SR_RDRF) + { + unsigned char data = regs->DR; + + if (fifo_isfull(&hw->serial->rxfifo)) + hw->serial->status |= SERRF_RXFIFOOVERRUN; + else + fifo_push(&hw->serial->rxfifo, data); + } + + // Writing anything to the status register clear the error bits. regs->SR = 0; } @@ -124,28 +210,37 @@ static void init(struct SerialHardware* _hw, struct Serial* ser) // Clear status register (IRQ/status flags) (void)regs->SR; regs->SR = 0; - + // Clear data register (void)regs->DR; - - // Set priorities for both IRQs + + // Install the handlers and set priorities for both IRQs + irq_install(hw->irq_tx, (isr_t)tx_isr, hw); + irq_install(hw->irq_rx, (isr_t)rx_isr, hw); irq_setpriority(hw->irq_tx, IRQ_PRIORITY_SCI_TX); irq_setpriority(hw->irq_rx, IRQ_PRIORITY_SCI_RX); // Activate the RX error interrupts, and RX/TX transmissions regs->CR = REG_SCI_CR_TE | REG_SCI_CR_RE; enable_rx_irq_bare(regs); - + // Disable GPIO pins for TX and RX lines - REG_GPIO_SERIAL->PER |= REG_GPIO_SERIAL_MASK; + // \todo this should be divided into serial 0 and 1 + REG_GPIO_SERIAL_0->PER |= REG_GPIO_SERIAL_MASK_0; + REG_GPIO_SERIAL_1->PER |= REG_GPIO_SERIAL_MASK_1; hw->serial = ser; } static void cleanup(struct SerialHardware* _hw) { - // TODO! - ASSERT(0); + struct SCI* hw = (struct SCI*)_hw; + + // Uninstall the ISRs + disable_rx_irq(_hw); + disable_tx_irq(_hw); + irq_uninstall(hw->irq_tx); + irq_uninstall(hw->irq_rx); } static void setbaudrate(struct SerialHardware* _hw, unsigned long rate) @@ -165,64 +260,121 @@ static void setparity(struct SerialHardware* _hw, int parity) } -static const struct SerialHardwareVT SCI_VT = -{ - .init = init, - .cleanup = cleanup, - .setbaudrate = setbaudrate, - .setparity = setparity, - .enabletxirq = enable_tx_irq, -}; +#if CONFIG_SER_MULTI -static struct SCI SCIDescs[2] = -{ - { - .hw = { .table = &SCI_VT }, - .regs = ®_SCI[0], - .irq_rx = IRQ_SCI0_RECEIVER_FULL, - .irq_tx = IRQ_SCI0_TRANSMITTER_READY, - }, - - { - .hw = { .table = &SCI_VT }, - .regs = ®_SCI[1], - .irq_rx = IRQ_SCI1_RECEIVER_FULL, - .irq_tx = IRQ_SCI1_TRANSMITTER_READY, - }, -}; +static void multi_init(void) +{ + static bool flag = false; + int i; + if (flag) + return; + for (i = 0; i < MAX_MULTI_GROUPS; ++i) + sem_init(&multi_sems[i]); + flag = true; +} -void ser_hw_tx_isr_0(void); -void ser_hw_tx_isr_0(void) +static void init_lock(struct SerialHardware* _hw, struct Serial *ser) { -#pragma interrupt warn - tx_isr(&SCIDescs[0]); + struct SCI* hw = (struct SCI*)_hw; + + // Initialize the multi engine (if needed) + multi_init(); + + // Acquire the lock of the semaphore for this group + ASSERT(hw->num_group >= 0); + ASSERT(hw->num_group < MAX_MULTI_GROUPS); + sem_obtain(&multi_sems[hw->num_group]); + + // Do a hardware switch to the given serial + ser_hw_switch(hw->num_group, hw->id); + + init(_hw, ser); } -void ser_hw_rx_isr_0(void); -void ser_hw_rx_isr_0(void) +static void cleanup_unlock(struct SerialHardware* _hw) { -#pragma interrupt warn - rx_isr(&SCIDescs[0]); + struct SCI* hw = (struct SCI*)_hw; + + cleanup(_hw); + + sem_release(&multi_sems[hw->num_group]); } -void ser_hw_tx_isr_1(void); -void ser_hw_tx_isr_1(void) +#endif /* CONFIG_SER_MULTI */ + + +static const struct SerialHardwareVT SCI_VT = { -#pragma interrupt warn - tx_isr(&SCIDescs[1]); -} + .init = init, + .cleanup = cleanup, + .setBaudrate = setbaudrate, + .setParity = setparity, + .txStart = enable_tx_irq, + .txSending = tx_irq_enabled, +}; -void ser_hw_rx_isr_1(void); -void ser_hw_rx_isr_1(void) +#if CONFIG_SER_MULTI +static const struct SerialHardwareVT SCI_MULTI_VT = { -#pragma interrupt warn - rx_isr(&SCIDescs[1]); -} + .init = init_lock, + .cleanup = cleanup_unlock, + .setBaudrate = setbaudrate, + .setParity = setparity, + .txStart = enable_tx_irq, + .txSending = tx_irq_enabled, +}; +#endif /* CONFIG_SER_MULTI */ + +#define SCI_DESC_NORMAL(hwch) \ + { \ + .hw = \ + { \ + .table = &SCI_VT, \ + .rxbuffer = ser ## hwch ## _fifo_rx, \ + .txbuffer = ser ## hwch ## _fifo_tx, \ + .rxbuffer_size = countof(ser ## hwch ## _fifo_rx), \ + .txbuffer_size = countof(ser ## hwch ## _fifo_tx), \ + }, \ + .regs = ®_SCI[hwch], \ + .irq_rx = IRQ_SCI ## hwch ## _RECEIVER_FULL, \ + .irq_tx = IRQ_SCI ## hwch ## _TRANSMITTER_READY, \ + .num_group = -1, \ + .id = -1, \ + } \ + /**/ + +#if CONFIG_SER_MULTI +#define SCI_DESC_MULTI(hwch, group_, id_) \ + { \ + .hw = \ + { \ + .table = &SCI_MULTI_VT, \ + .rxbuffer = ser ## hwch ## _fifo_rx, \ + .txbuffer = ser ## hwch ## _fifo_tx, \ + .rxbuffer_size = countof(ser ## hwch ## _fifo_rx), \ + .txbuffer_size = countof(ser ## hwch ## _fifo_tx), \ + }, \ + .regs = ®_SCI[hwch], \ + .irq_rx = IRQ_SCI ## hwch ## _RECEIVER_FULL, \ + .irq_tx = IRQ_SCI ## hwch ## _TRANSMITTER_READY, \ + .num_group = group_, \ + .id = id_, \ + } \ + /**/ +#endif /* CONFIG_SER_MULTI */ + +// \todo Move this into hw.h, with a little preprocessor magic +static struct SCI SCIDescs[] = +{ + SCI_DESC_NORMAL(0), + SCI_DESC_MULTI(1, 0, 0), + SCI_DESC_MULTI(1, 0, 1), +}; struct SerialHardware* ser_hw_getdesc(int unit) { - ASSERT(unit < 2); + ASSERT(unit < countof(SCIDescs)); return &SCIDescs[unit].hw; }