X-Git-Url: https://codewiz.org/gitweb?a=blobdiff_plain;f=drv%2Ftimer_avr.h;h=52dea9cf362d754525e631114c2f169b6e0bf127;hb=680ecaecd7ed77d044fbf333ce97e533b04bbfa3;hp=0d32701896d59627a1992e5c8a973c5b1a37e942;hpb=be670d92a85770cfa7edcbaca9a94032ddf1b114;p=bertos.git

diff --git a/drv/timer_avr.h b/drv/timer_avr.h
index 0d327018..52dea9cf 100755
--- a/drv/timer_avr.h
+++ b/drv/timer_avr.h
@@ -15,6 +15,18 @@
 
 /*#*
  *#* $Log$
+ *#* Revision 1.21  2004/12/13 12:07:06  bernie
+ *#* DISABLE_IRQSAVE/ENABLE_IRQRESTORE: Convert to IRQ_SAVE_DISABLE/IRQ_RESTORE.
+ *#*
+ *#* Revision 1.20  2004/11/16 20:59:46  bernie
+ *#* Include <avr/io.h> explicitly.
+ *#*
+ *#* Revision 1.19  2004/10/19 08:56:41  bernie
+ *#* TIMER_STROBE_ON, TIMER_STROBE_OFF, TIMER_STROBE_INIT: Move from timer_avr.h to timer.h, where they really belong.
+ *#*
+ *#* Revision 1.18  2004/09/20 03:31:03  bernie
+ *#* Fix racy racy code.
+ *#*
  *#* Revision 1.17  2004/09/14 21:07:09  bernie
  *#* Include hw.h explicitly.
  *#*
@@ -48,8 +60,8 @@
 #include <arch_config.h> // ARCH_BOARD_KC
 #include "hw.h"
 
-#include <avr/wdt.h>
 #include <avr/signal.h>
+#include <avr/io.h>
 
 #if defined(ARCH_BOARD_KC) && (ARCH & ARCH_BOARD_KC)
 	#include <drv/adc.h>
@@ -67,23 +79,6 @@
 #define TIMER_ON_OUTPUT_COMPARE2  3
 
 
-/*!
- * \def CONFIG_TIMER_STROBE
- *
- * This is a debug facility that can be used to
- * monitor timer interrupt activity on an external pin.
- *
- * To use strobes, redefine the macros TIMER_STROBE_ON,
- * TIMER_STROBE_OFF and TIMER_STROBE_INIT and set
- * CONFIG_TIMER_STROBE to 1.
- */
-#if !defined(CONFIG_TIMER_STROBE) || !CONFIG_TIMER_STROBE
-	#define TIMER_STROBE_ON    do {/*nop*/} while(0)
-	#define TIMER_STROBE_OFF   do {/*nop*/} while(0)
-	#define TIMER_STROBE_INIT  do {/*nop*/} while(0)
-#endif
-
-
 /* Not needed, IRQ timer flag cleared automatically */
 #define timer_hw_irq() do {} while (0)
 
@@ -104,7 +99,7 @@
 	static void timer_hw_init(void)
 	{
 		cpuflags_t flags;
-		DISABLE_IRQSAVE(flags);
+		IRQ_SAVE_DISABLE(flags);
 
 		/* Reset Timer flags */
 		TIFR = BV(OCF0) | BV(TOV0);
@@ -125,7 +120,7 @@
 		TIMSK &= ~BV(TOIE0);
 		TIMSK |= BV(OCIE0);
 
-		ENABLE_IRQRESTORE(flags);
+		IRQ_RESTORE(flags);
 	}
 
 	//! Frequency of the hardware high precision timer
@@ -144,7 +139,7 @@
 	static void timer_hw_init(void)
 	{
 		cpuflags_t flags;
-		DISABLE_IRQSAVE(flags);
+		IRQ_SAVE_DISABLE(flags);
 
 		/* Reset Timer overflow flag */
 		TIFR |= BV(TOV1);
@@ -161,7 +156,7 @@
 		/* Enable timer interrupt: Timer/Counter1 Overflow */
 		TIMSK |= BV(TOIE1);
 
-		ENABLE_IRQRESTORE(flags);
+		IRQ_RESTORE(flags);
 	}
 
 	//! Frequency of the hardware high precision timer
@@ -180,7 +175,7 @@
 	static void timer_hw_init(void)
 	{
 		cpuflags_t flags;
-		DISABLE_IRQSAVE(flags);
+		IRQ_SAVE_DISABLE(flags);
 
 		/* Reset Timer flags */
 		TIFR = BV(OCF2) | BV(TOV2);
@@ -202,7 +197,7 @@
 		TIMSK &= ~BV(TOIE2);
 		TIMSK |= BV(OCIE2);
 
-		ENABLE_IRQRESTORE(flags);
+		IRQ_RESTORE(flags);
 	}
 
 	//! Frequency of the hardware high precision timer
@@ -233,22 +228,6 @@
 	 */
 	SIGNAL(SIG_OVERFLOW1)
 	{
-		/*!
-		 * How many overflow we have to count before calling the true timer handler.
-		 * If timer overflow is at 24 kHz, with a value of 24 we have 1 ms between
-		 * each call.
-		 */
-		#define TIMER1_OVF_COUNT 24
-
-		static uint8_t count = TIMER1_OVF_COUNT;
-
-		count--;
-		if (!count)
-		{
-			timer_handler();
-			count = TIMER1_OVF_COUNT;
-		}
-
 	#if (ARCH & ARCH_BOARD_KC)
 		/*
 		 * Super-optimization-hack: switch CPU ADC mux here, ASAP after the start
@@ -259,18 +238,49 @@
 		 * of the handler.
 		 *
 		 * The switch is synchronized with the ADC handler using _adc_trigger_lock.
+		 *
+		 *      Mel (A Real Programmer)
 		 */
 		extern uint8_t _adc_idx_next;
 		extern bool _adc_trigger_lock;
 
 		if (!_adc_trigger_lock)
 		{
-			TIMER_STROBE_ON;
+			/*
+			 * Disable free-running mode to avoid starting a
+			 * new conversion before the ADC handler has read
+			 * the ongoing one.  This condition could occur
+			 * under very high interrupt load and would have the
+			 * unwanted effect of reading from the wrong ADC
+			 * channel.
+			 *
+			 * NOTE: writing 0 to ADSC and ADIF has no effect.
+			 */
+			ADCSRA = ADCSRA & ~(BV(ADFR) | BV(ADIF) | BV(ADSC));
+
 			ADC_SETCHN(_adc_idx_next);
-			TIMER_STROBE_OFF;
 			_adc_trigger_lock = true;
 		}
-	#endif
+	#endif // ARCH_BOARD_KC
+
+		/*!
+		 * How many timer overflows we must count before calling the real
+		 * timer handler.
+		 * When the timer is programmed to overflow at 24 kHz, a value of
+		 * 24 will result in 1ms between each call.
+		 */
+		#define TIMER1_OVF_COUNT 24
+		//#warning TIMER1_OVF_COUNT for timer at 12 kHz
+		//#define TIMER1_OVF_COUNT 12
+
+		static uint8_t count = TIMER1_OVF_COUNT;
+
+		count--;
+		if (!count)
+		{
+			timer_handler();
+			count = TIMER1_OVF_COUNT;
+		}
 	}
 
 #elif (CONFIG_TIMER == TIMER_ON_OUTPUT_COMPARE0)