X-Git-Url: https://codewiz.org/gitweb?a=blobdiff_plain;f=drv%2Ftimer_avr.h;h=f8dbaa3dc980a36ecec843d0b45a7fa7d2f3e9c6;hb=1f9a4aef45e0bf55a31bf88a828ebd867cf32a34;hp=2cfb016aeb11c9bd2dc0d6efd9e05aba1804f604;hpb=8d805e5800ebfc5c3f04ae18434e857f5e51f1c4;p=bertos.git

diff --git a/drv/timer_avr.h b/drv/timer_avr.h
index 2cfb016a..f8dbaa3d 100755
--- a/drv/timer_avr.h
+++ b/drv/timer_avr.h
@@ -15,6 +15,12 @@
 
 /*#*
  *#* $Log$
+ *#* Revision 1.18  2004/09/20 03:31:03  bernie
+ *#* Fix racy racy code.
+ *#*
+ *#* Revision 1.17  2004/09/14 21:07:09  bernie
+ *#* Include hw.h explicitly.
+ *#*
  *#* Revision 1.16  2004/09/06 21:49:26  bernie
  *#* CONFIG_TIMER_STROBE: be tolerant with missing optional macro.
  *#*
@@ -43,6 +49,8 @@
 #define DRV_TIMER_AVR_H
 
 #include <arch_config.h> // ARCH_BOARD_KC
+#include "hw.h"
+
 #include <avr/wdt.h>
 #include <avr/signal.h>
 
@@ -228,22 +236,6 @@
 	 */
 	SIGNAL(SIG_OVERFLOW1)
 	{
-		/*!
-		 * How many overflow we have to count before calling the true timer handler.
-		 * If timer overflow is at 24 kHz, with a value of 24 we have 1 ms between
-		 * each call.
-		 */
-		#define TIMER1_OVF_COUNT 24
-
-		static uint8_t count = TIMER1_OVF_COUNT;
-
-		count--;
-		if (!count)
-		{
-			timer_handler();
-			count = TIMER1_OVF_COUNT;
-		}
-
 	#if (ARCH & ARCH_BOARD_KC)
 		/*
 		 * Super-optimization-hack: switch CPU ADC mux here, ASAP after the start
@@ -254,18 +246,49 @@
 		 * of the handler.
 		 *
 		 * The switch is synchronized with the ADC handler using _adc_trigger_lock.
+		 *
+		 *      Mel (A Real Programmer)
 		 */
 		extern uint8_t _adc_idx_next;
 		extern bool _adc_trigger_lock;
 
 		if (!_adc_trigger_lock)
 		{
-			TIMER_STROBE_ON;
+			/*
+			 * Disable free-running mode to avoid starting a
+			 * new conversion before the ADC handler has read
+			 * the ongoing one.  This condition could occur
+			 * under very high interrupt load and would have the
+			 * unwanted effect of reading from the wrong ADC
+			 * channel.
+			 *
+			 * NOTE: writing 0 to ADSC and ADIF has no effect.
+			 */
+			ADCSRA = ADCSRA & ~(BV(ADFR) | BV(ADIF) | BV(ADSC));
+
 			ADC_SETCHN(_adc_idx_next);
-			TIMER_STROBE_OFF;
 			_adc_trigger_lock = true;
 		}
-	#endif
+	#endif // ARCH_BOARD_KC
+
+		/*!
+		 * How many timer overflows we must count before calling the real
+		 * timer handler.
+		 * When the timer is programmed to overflow at 24 kHz, a value of
+		 * 24 will result in 1ms between each call.
+		 */
+		#define TIMER1_OVF_COUNT 24
+		//#warning TIMER1_OVF_COUNT for timer at 12 kHz
+		//#define TIMER1_OVF_COUNT 12
+
+		static uint8_t count = TIMER1_OVF_COUNT;
+
+		count--;
+		if (!count)
+		{
+			timer_handler();
+			count = TIMER1_OVF_COUNT;
+		}
 	}
 
 #elif (CONFIG_TIMER == TIMER_ON_OUTPUT_COMPARE0)