X-Git-Url: https://codewiz.org/gitweb?a=blobdiff_plain;f=drv%2Ftimer_avr.h;h=fa652b34908c71132d072d3eca5ab0fb3b8333ee;hb=6ca5e6259460b1541d1b6e6d3f1ac9734901f573;hp=0ba8d52b0ce49db65cf5fae16fb0d009cad1833b;hpb=528790e0e4433fa1e1394cdfa23eb33dfd934185;p=bertos.git diff --git a/drv/timer_avr.h b/drv/timer_avr.h index 0ba8d52b..fa652b34 100755 --- a/drv/timer_avr.h +++ b/drv/timer_avr.h @@ -16,6 +16,12 @@ /*#* *#* $Log$ + *#* Revision 1.27 2006/05/18 00:38:24 bernie + *#* Use hw_cpu.h instead of ubiquitous hw.h. + *#* + *#* Revision 1.26 2006/02/21 21:28:02 bernie + *#* New time handling based on TIMER_TICKS_PER_SEC to support slow timers with ticks longer than 1ms. + *#* *#* Revision 1.25 2005/07/19 07:26:37 bernie *#* Refactor to decouple timer ticks from milliseconds. *#* @@ -40,27 +46,33 @@ #ifndef DRV_TIMER_AVR_H #define DRV_TIMER_AVR_H -#include /* CONFIG_TIMER */ -#include +#include /* CONFIG_TIMER */ +#include /* uint8_t */ +#include /* CLOCK_FREQ */ /*! - * Values for CONFIG_TIMER. + * \name Values for CONFIG_TIMER. * * Select which hardware timer interrupt to use for system clock and softtimers. * \note The timer 1 overflow mode set the timer as a 24 kHz PWM. + * + * \{ */ #define TIMER_ON_OUTPUT_COMPARE0 1 #define TIMER_ON_OVERFLOW1 2 #define TIMER_ON_OUTPUT_COMPARE2 3 #define TIMER_ON_OVERFLOW3 4 +/* \} */ -/*! HW dependent timer initialization */ +/* + * Hardware dependent timer initialization. + */ #if (CONFIG_TIMER == TIMER_ON_OUTPUT_COMPARE0) #define TIMER_PRESCALER 64 #define TIMER_HW_BITS 8 #define DEFINE_TIMER_ISR SIGNAL(SIG_OUTPUT_COMPARE0) - #define TIMER_TICKS_PER_MSEC 1 + #define TIMER_TICKS_PER_SEC 1000 #define TIMER_HW_CNT OCR_DIVISOR //! Type of time expressed in ticks of the hardware high-precision timer @@ -73,7 +85,7 @@ /*! This value is the maximum in overflow based timers. */ #define TIMER_HW_CNT (1 << TIMER_HW_BITS) #define DEFINE_TIMER_ISR SIGNAL(SIG_OVERFLOW1) - #define TIMER_TICKS_PER_MSEC (((TIMER_HW_HPTICKS_PER_SEC + TIMER_HW_CNT / 2) / TIMER_HW_CNT + 500) / 1000) + #define TIMER_TICKS_PER_SEC ((TIMER_HW_HPTICKS_PER_SEC + TIMER_HW_CNT / 2) / TIMER_HW_CNT) //! Type of time expressed in ticks of the hardware high precision timer typedef uint16_t hptime_t; @@ -83,7 +95,7 @@ #define TIMER_PRESCALER 64 #define TIMER_HW_BITS 8 #define DEFINE_TIMER_ISR SIGNAL(SIG_OUTPUT_COMPARE2) - #define TIMER_TICKS_PER_MSEC 1 + #define TIMER_TICKS_PER_SEC 1000 /*! Value for OCR register in output-compare based timers. */ #define TIMER_HW_CNT OCR_DIVISOR @@ -98,7 +110,7 @@ /*! This value is the maximum in overflow based timers. */ #define TIMER_HW_CNT (1 << TIMER_HW_BITS) #define DEFINE_TIMER_ISR SIGNAL(SIG_OVERFLOW3) - #define TIMER_TICKS_PER_MSEC (((TIMER_HW_HPTICKS_PER_SEC + TIMER_HW_CNT / 2) / TIMER_HW_CNT + 500) / 1000) + #define TIMER_TICKS_PER_SEC ((TIMER_HW_HPTICKS_PER_SEC + TIMER_HW_CNT / 2) / TIMER_HW_CNT) //! Type of time expressed in ticks of the hardware high precision timer typedef uint16_t hptime_t; @@ -108,14 +120,14 @@ #endif /* CONFIG_TIMER */ -/*! Frequency of the hardware high precision timer */ +/*! Frequency of the hardware high precision timer. */ #define TIMER_HW_HPTICKS_PER_SEC ((CLOCK_FREQ + TIMER_PRESCALER / 2) / TIMER_PRESCALER) /*! * System timer: additional division after the prescaler * 12288000 / 64 / 192 (0..191) = 1 ms */ -#define OCR_DIVISOR (((CLOCK_FREQ + TIMER_PRESCALER / 2) / TIMER_PRESCALER + TICKS_PER_SEC / 2) / TICKS_PER_SEC - 1) /* 191 */ +#define OCR_DIVISOR (((CLOCK_FREQ + TIMER_PRESCALER / 2) / TIMER_PRESCALER + TIMER_TICKS_PER_SEC / 2) / TIMER_TICKS_PER_SEC - 1) /*! Not needed, IRQ timer flag cleared automatically */ #define timer_hw_irq() do {} while (0)