X-Git-Url: https://codewiz.org/gitweb?a=blobdiff_plain;f=drv%2Ftimer_avr.h;h=fa652b34908c71132d072d3eca5ab0fb3b8333ee;hb=b25aabb82dd47404b0697e1394fd3a14963e1224;hp=4f842eefc0b4a7d152d3bfd5c72b6f9b809d2bb4;hpb=2708af4ade1a189c58adb4a6e543ea80be781730;p=bertos.git diff --git a/drv/timer_avr.h b/drv/timer_avr.h index 4f842eef..fa652b34 100755 --- a/drv/timer_avr.h +++ b/drv/timer_avr.h @@ -1,238 +1,136 @@ /*! * \file * * * \version $Id$ * * \author Bernardo Innocenti + * \author Francesco Sacchi * - * \brief Low-level timer module for AVR - */ - -/* - * $Log$ - * Revision 1.6 2004/07/20 23:48:16 bernie - * Finally remove redundant protos. - * - * Revision 1.5 2004/07/18 22:16:35 bernie - * Add missing header; Prevent warning for project_ks-specific code. - * - * Revision 1.4 2004/06/27 15:22:15 aleph - * Fix spacing - * - * Revision 1.3 2004/06/07 15:57:40 aleph - * Update to latest AVR timer code - * - * Revision 1.2 2004/06/03 11:27:09 bernie - * Add dual-license information. - * - * Revision 1.1 2004/05/23 18:23:30 bernie - * Import drv/timer module. - * + * \brief Low-level timer module for AVR (interface). */ +/*#* + *#* $Log$ + *#* Revision 1.27 2006/05/18 00:38:24 bernie + *#* Use hw_cpu.h instead of ubiquitous hw.h. + *#* + *#* Revision 1.26 2006/02/21 21:28:02 bernie + *#* New time handling based on TIMER_TICKS_PER_SEC to support slow timers with ticks longer than 1ms. + *#* + *#* Revision 1.25 2005/07/19 07:26:37 bernie + *#* Refactor to decouple timer ticks from milliseconds. + *#* + *#* Revision 1.24 2005/04/11 19:10:28 bernie + *#* Include top-level headers from cfg/ subdir. + *#* + *#* Revision 1.23 2005/03/01 23:24:51 bernie + *#* Tweaks for avr-libc 1.2.x. + *#* + *#* Revision 1.21 2004/12/13 12:07:06 bernie + *#* DISABLE_IRQSAVE/ENABLE_IRQRESTORE: Convert to IRQ_SAVE_DISABLE/IRQ_RESTORE. + *#* + *#* Revision 1.20 2004/11/16 20:59:46 bernie + *#* Include explicitly. + *#* + *#* Revision 1.19 2004/10/19 08:56:41 bernie + *#* TIMER_STROBE_ON, TIMER_STROBE_OFF, TIMER_STROBE_INIT: Move from timer_avr.h to timer.h, where they really belong. + *#* + *#* Revision 1.18 2004/09/20 03:31:03 bernie + *#* Fix racy racy code. + *#*/ #ifndef DRV_TIMER_AVR_H #define DRV_TIMER_AVR_H -#include -#include - -#if defined(ARCH_BOARD_KC) && (ARCH & ARCH_BOARD_KC) - #include -#endif - - -#define timer_hw_irq() /* Not needed, IRQ timer flag cleared automatically */ +#include /* CONFIG_TIMER */ +#include /* uint8_t */ +#include /* CLOCK_FREQ */ /*! - * System timer: additional division after the prescaler - * 12288000 / 64 / 192 (0..191) = 1 ms + * \name Values for CONFIG_TIMER. + * + * Select which hardware timer interrupt to use for system clock and softtimers. + * \note The timer 1 overflow mode set the timer as a 24 kHz PWM. + * + * \{ */ -#define OCR_DIVISOR 191 +#define TIMER_ON_OUTPUT_COMPARE0 1 +#define TIMER_ON_OVERFLOW1 2 +#define TIMER_ON_OUTPUT_COMPARE2 3 +#define TIMER_ON_OVERFLOW3 4 +/* \} */ -/*! HW dependent timer initialization */ -#if defined(CONFIG_TIMER_ON_TIMER0) +/* + * Hardware dependent timer initialization. + */ +#if (CONFIG_TIMER == TIMER_ON_OUTPUT_COMPARE0) + + #define TIMER_PRESCALER 64 + #define TIMER_HW_BITS 8 + #define DEFINE_TIMER_ISR SIGNAL(SIG_OUTPUT_COMPARE0) + #define TIMER_TICKS_PER_SEC 1000 + #define TIMER_HW_CNT OCR_DIVISOR //! Type of time expressed in ticks of the hardware high-precision timer typedef uint8_t hptime_t; - static void timer_hw_init(void) - { - cpuflags_t flags; - DISABLE_IRQSAVE(flags); - - /* Reset Timer flags */ - TIFR = BV(OCF0) | BV(TOV0); +#elif (CONFIG_TIMER == TIMER_ON_OVERFLOW1) - /* Setup Timer/Counter interrupt */ - ASSR = 0x00; /* internal system clock */ - TCCR0 = BV(WGM01) | BV(CS02); /* Clear on Compare match & prescaler = 64. When changing - prescaler change TIMER_HW_HPTICKS_PER_SEC too */ - TCNT0 = 0x00; /* initialization of Timer/Counter */ - OCR0 = OCR_DIVISOR; /* Timer/Counter Output Compare Register */ - - /* Enable timer interrupts: Timer/Counter2 Output Compare (OCIE2) */ - TIMSK &= ~BV(TOIE0); - TIMSK |= BV(OCIE0); - - ENABLE_IRQRESTORE(flags); - } - - //! Frequency of the hardware high precision timer - #define TIMER_HW_HPTICKS_PER_SEC (CLOCK_FREQ / 64) - - INLINE hptime_t timer_hw_hpread(void) - { - return TCNT0; - } - -#elif defined(CONFIG_TIMER_ON_TIMER1_OVERFLOW) + #define TIMER_PRESCALER 1 + #define TIMER_HW_BITS 8 + /*! This value is the maximum in overflow based timers. */ + #define TIMER_HW_CNT (1 << TIMER_HW_BITS) + #define DEFINE_TIMER_ISR SIGNAL(SIG_OVERFLOW1) + #define TIMER_TICKS_PER_SEC ((TIMER_HW_HPTICKS_PER_SEC + TIMER_HW_CNT / 2) / TIMER_HW_CNT) //! Type of time expressed in ticks of the hardware high precision timer typedef uint16_t hptime_t; - static void timer_hw_init(void) - { - cpuflags_t flags; - DISABLE_IRQSAVE(flags); - - /* Reset Timer overflow flag */ - TIFR |= BV(TOV1); - - /* Fast PWM mode, 9 bit, 24 kHz, no prescaling. When changing freq or - resolution (top of TCNT), change TIMER_HW_HPTICKS_PER_SEC too */ - TCCR1A |= BV(WGM11); - TCCR1A &= ~BV(WGM10); - TCCR1B |= BV(WGM12) | BV(CS10); - TCCR1B &= ~(BV(WGM13) | BV(CS11) | BV(CS12)); - - TCNT1 = 0x00; /* initialization of Timer/Counter */ - - /* Enable timer interrupt: Timer/Counter1 Overflow */ - TIMSK |= BV(TOIE1); - - ENABLE_IRQRESTORE(flags); - } +#elif (CONFIG_TIMER == TIMER_ON_OUTPUT_COMPARE2) - //! Frequency of the hardware high precision timer - #define TIMER_HW_HPTICKS_PER_SEC (24000ul * 512) + #define TIMER_PRESCALER 64 + #define TIMER_HW_BITS 8 + #define DEFINE_TIMER_ISR SIGNAL(SIG_OUTPUT_COMPARE2) + #define TIMER_TICKS_PER_SEC 1000 + /*! Value for OCR register in output-compare based timers. */ + #define TIMER_HW_CNT OCR_DIVISOR - INLINE hptime_t timer_hw_hpread(void) - { - return TCNT1; - } - -#elif defined(CONFIG_TIMER_ON_TIMER2) //! Type of time expressed in ticks of the hardware high precision timer typedef uint8_t hptime_t; - static void timer_hw_init(void) - { - cpuflags_t flags; - DISABLE_IRQSAVE(flags); +#elif (CONFIG_TIMER == TIMER_ON_OVERFLOW3) - /* Reset Timer flags */ - TIFR = BV(OCF2) | BV(TOV2); + #define TIMER_PRESCALER 1 + #define TIMER_HW_BITS 8 + /*! This value is the maximum in overflow based timers. */ + #define TIMER_HW_CNT (1 << TIMER_HW_BITS) + #define DEFINE_TIMER_ISR SIGNAL(SIG_OVERFLOW3) + #define TIMER_TICKS_PER_SEC ((TIMER_HW_HPTICKS_PER_SEC + TIMER_HW_CNT / 2) / TIMER_HW_CNT) - /* Setup Timer/Counter interrupt */ - TCCR2 = BV(WGM21) | BV(CS21) | BV(CS20); - /* Clear on Compare match & prescaler = 64, internal sys clock. - When changing prescaler change TIMER_HW_HPTICKS_PER_SEC too */ - TCNT2 = 0x00; /* initialization of Timer/Counter */ - OCR2 = OCR_DIVISOR; /* Timer/Counter Output Compare Register */ + //! Type of time expressed in ticks of the hardware high precision timer + typedef uint16_t hptime_t; +#else - /* Enable timer interrupts: Timer/Counter2 Output Compare (OCIE2) */ - TIMSK &= ~BV(TOIE2); - TIMSK |= BV(OCIE2); + #error Unimplemented value for CONFIG_TIMER +#endif /* CONFIG_TIMER */ - ENABLE_IRQRESTORE(flags); - } - //! Frequency of the hardware high precision timer - #define TIMER_HW_HPTICKS_PER_SEC (CLOCK_FREQ / 64) +/*! Frequency of the hardware high precision timer. */ +#define TIMER_HW_HPTICKS_PER_SEC ((CLOCK_FREQ + TIMER_PRESCALER / 2) / TIMER_PRESCALER) - INLINE hptime_t timer_hw_hpread(void) - { - return TCNT2; - } +/*! + * System timer: additional division after the prescaler + * 12288000 / 64 / 192 (0..191) = 1 ms + */ +#define OCR_DIVISOR (((CLOCK_FREQ + TIMER_PRESCALER / 2) / TIMER_PRESCALER + TIMER_TICKS_PER_SEC / 2) / TIMER_TICKS_PER_SEC - 1) -#else - #error Choose witch timer to use with CONFIG_TIMER_ON_TIMERx -#endif /* CONFIG_TIMER_ON_TIMERx */ - - -#if defined(CONFIG_TIMER_ON_TIMER1_OVERFLOW) - - #define DEFINE_TIMER_ISR \ - static void timer_handler(void) - - DEFINE_TIMER_ISR; - - /* - * Timer 1 overflow irq handler. It's called at the frequency of the timer 1 - * PWM (should be 24 kHz). It's too much for timer purposes, so the interrupt - * handler is really a counter that call the true handler in timer.c - * every 1 ms. - */ - SIGNAL(SIG_OVERFLOW1) - { - /*! - * How many overflow we have to count before calling the true timer handler. - * If timer overflow is at 24 kHz, with a value of 24 we have 1 ms between - * each call. - */ - #define TIMER1_OVF_COUNT 24 - - static uint8_t count = TIMER1_OVF_COUNT; - - count--; - if (!count) - { - timer_handler(); - count = TIMER1_OVF_COUNT; - } - - #if (ARCH & ARCH_BOARD_KC) - /* - * Super-optimization-hack: switch CPU ADC mux here, ASAP after the start - * of conversion (auto-triggered with timer 1 overflow). - * The switch can be done 2 ADC cycles after start of conversion. - * The handler prologue takes a little more than 32 CPU cycles: with - * the prescaler at 1/16 the timing should be correct even at the start - * of the handler. - * - * The switch is synchronized with the ADC handler using _adc_trigger_lock. - */ - extern uint8_t _adc_idx_next; - extern bool _adc_trigger_lock; - - if (!_adc_trigger_lock) - { - TIMER_STROBE_ON; - ADC_SETCHN(_adc_idx_next); - TIMER_STROBE_OFF; - _adc_trigger_lock = true; - } - #endif - } - -#elif defined (CONFIG_TIMER_ON_TIMER0) - - #define DEFINE_TIMER_ISR \ - SIGNAL(SIG_OUTPUT_COMPARE0) - -#elif defined(CONFIG_TIMER_ON_TIMER2) - - #define DEFINE_TIMER_ISR \ - SIGNAL(SIG_OUTPUT_COMPARE2) +/*! Not needed, IRQ timer flag cleared automatically */ +#define timer_hw_irq() do {} while (0) -#else - #error Choose witch timer to use with CONFIG_TIMER_ON_TIMERx -#endif /* CONFIG_TIMER_ON_TIMERx */ #endif /* DRV_TIMER_AVR_H */