X-Git-Url: https://codewiz.org/gitweb?a=blobdiff_plain;f=drv%2Ftimer_avr.h;h=fe5ba9b8f9736924a6eacc29dbbe066429ee3634;hb=0021318b90d6cc2da07904de709f9901f77b2c86;hp=15bf8730f476ce61dc7b11eb45bd1c94c5635fe7;hpb=d0c3b9f14ce6bcf214e6957b888183a30baae13d;p=bertos.git diff --git a/drv/timer_avr.h b/drv/timer_avr.h index 15bf8730..fe5ba9b8 100755 --- a/drv/timer_avr.h +++ b/drv/timer_avr.h @@ -1,9 +1,9 @@ /*! * \file * * * \version $Id$ @@ -13,43 +13,80 @@ * \brief Low-level timer module for AVR */ -/* - * $Log$ - * Revision 1.7 2004/07/20 23:49:40 bernie - * Compute value of OCR_DIVISOR from CLOCK_FREQ. - * - * Revision 1.6 2004/07/20 23:48:16 bernie - * Finally remove redundant protos. - * - * Revision 1.5 2004/07/18 22:16:35 bernie - * Add missing header; Prevent warning for project_ks-specific code. - * - * Revision 1.4 2004/06/27 15:22:15 aleph - * Fix spacing - * - * Revision 1.3 2004/06/07 15:57:40 aleph - * Update to latest AVR timer code - * - * Revision 1.2 2004/06/03 11:27:09 bernie - * Add dual-license information. - * - * Revision 1.1 2004/05/23 18:23:30 bernie - * Import drv/timer module. - * - */ - +/*#* + *#* $Log$ + *#* Revision 1.23 2005/03/01 23:24:51 bernie + *#* Tweaks for avr-libc 1.2.x. + *#* + *#* Revision 1.21 2004/12/13 12:07:06 bernie + *#* DISABLE_IRQSAVE/ENABLE_IRQRESTORE: Convert to IRQ_SAVE_DISABLE/IRQ_RESTORE. + *#* + *#* Revision 1.20 2004/11/16 20:59:46 bernie + *#* Include explicitly. + *#* + *#* Revision 1.19 2004/10/19 08:56:41 bernie + *#* TIMER_STROBE_ON, TIMER_STROBE_OFF, TIMER_STROBE_INIT: Move from timer_avr.h to timer.h, where they really belong. + *#* + *#* Revision 1.18 2004/09/20 03:31:03 bernie + *#* Fix racy racy code. + *#* + *#* Revision 1.17 2004/09/14 21:07:09 bernie + *#* Include hw.h explicitly. + *#* + *#* Revision 1.16 2004/09/06 21:49:26 bernie + *#* CONFIG_TIMER_STROBE: be tolerant with missing optional macro. + *#* + *#* Revision 1.15 2004/08/25 14:12:08 rasky + *#* Aggiornato il comment block dei log RCS + *#* + *#* Revision 1.14 2004/08/24 16:27:01 bernie + *#* Add missing headers. + *#* + *#* Revision 1.13 2004/08/24 14:30:11 bernie + *#* Use new-style config macros for drv/timer.c + *#* + *#* Revision 1.12 2004/08/10 06:59:45 bernie + *#* CONFIG_TIMER_STROBE: Define no-op default macros. + *#* + *#* Revision 1.11 2004/08/03 15:53:17 aleph + *#* Fix spacing + *#* + *#* Revision 1.10 2004/08/02 20:20:29 aleph + *#* Merge from project_ks + *#* + *#* Revision 1.9 2004/07/22 02:01:14 bernie + *#* Use TIMER_PRESCALER consistently. + *#*/ #ifndef DRV_TIMER_AVR_H #define DRV_TIMER_AVR_H -#include +#include // ARCH_BOARD_KC +#include // BV() +#include + #include +#include #if defined(ARCH_BOARD_KC) && (ARCH & ARCH_BOARD_KC) #include #endif -#define timer_hw_irq() /* Not needed, IRQ timer flag cleared automatically */ +/*! + * Values for CONFIG_TIMER. + * + * Select which hardware timer interrupt to use for system clock and softtimers. + * \note The timer 1 overflow mode set the timer as a 24 kHz PWM. + */ +#define TIMER_ON_OUTPUT_COMPARE0 1 +#define TIMER_ON_OVERFLOW1 2 +#define TIMER_ON_OUTPUT_COMPARE2 3 + + +/* Not needed, IRQ timer flag cleared automatically */ +#define timer_hw_irq() do {} while (0) + +#define TIMER_PRESCALER 64 /*! * System timer: additional division after the prescaler @@ -58,7 +95,7 @@ #define OCR_DIVISOR (CLOCK_FREQ / TIMER_PRESCALER / TICKS_PER_SEC - 1) /* 191 */ /*! HW dependent timer initialization */ -#if defined(CONFIG_TIMER_ON_TIMER0) +#if (CONFIG_TIMER == TIMER_ON_OUTPUT_COMPARE0) //! Type of time expressed in ticks of the hardware high-precision timer typedef uint8_t hptime_t; @@ -66,34 +103,39 @@ static void timer_hw_init(void) { cpuflags_t flags; - DISABLE_IRQSAVE(flags); + IRQ_SAVE_DISABLE(flags); /* Reset Timer flags */ TIFR = BV(OCF0) | BV(TOV0); /* Setup Timer/Counter interrupt */ - ASSR = 0x00; /* internal system clock */ - TCCR0 = BV(WGM01) | BV(CS02); /* Clear on Compare match & prescaler = 64. When changing - prescaler change TIMER_HW_HPTICKS_PER_SEC too */ - TCNT0 = 0x00; /* initialization of Timer/Counter */ + ASSR = 0x00; /* Internal system clock */ + TCCR0 = BV(WGM01) /* Clear on Compare match */ + #if TIMER_PRESCALER == 64 + | BV(CS02) + #else + #error Unsupported value of TIMER_PRESCALER + #endif + ; + TCNT0 = 0x00; /* Initialization of Timer/Counter */ OCR0 = OCR_DIVISOR; /* Timer/Counter Output Compare Register */ /* Enable timer interrupts: Timer/Counter2 Output Compare (OCIE2) */ TIMSK &= ~BV(TOIE0); TIMSK |= BV(OCIE0); - ENABLE_IRQRESTORE(flags); + IRQ_RESTORE(flags); } //! Frequency of the hardware high precision timer - #define TIMER_HW_HPTICKS_PER_SEC (CLOCK_FREQ / 64) + #define TIMER_HW_HPTICKS_PER_SEC (CLOCK_FREQ / TIMER_PRESCALER) INLINE hptime_t timer_hw_hpread(void) { return TCNT0; } -#elif defined(CONFIG_TIMER_ON_TIMER1_OVERFLOW) +#elif (CONFIG_TIMER == TIMER_ON_OVERFLOW1) //! Type of time expressed in ticks of the hardware high precision timer typedef uint16_t hptime_t; @@ -101,7 +143,7 @@ static void timer_hw_init(void) { cpuflags_t flags; - DISABLE_IRQSAVE(flags); + IRQ_SAVE_DISABLE(flags); /* Reset Timer overflow flag */ TIFR |= BV(TOV1); @@ -118,7 +160,7 @@ /* Enable timer interrupt: Timer/Counter1 Overflow */ TIMSK |= BV(TOIE1); - ENABLE_IRQRESTORE(flags); + IRQ_RESTORE(flags); } //! Frequency of the hardware high precision timer @@ -129,7 +171,7 @@ return TCNT1; } -#elif defined(CONFIG_TIMER_ON_TIMER2) +#elif (CONFIG_TIMER == TIMER_ON_OUTPUT_COMPARE2) //! Type of time expressed in ticks of the hardware high precision timer typedef uint8_t hptime_t; @@ -137,13 +179,19 @@ static void timer_hw_init(void) { cpuflags_t flags; - DISABLE_IRQSAVE(flags); + IRQ_SAVE_DISABLE(flags); /* Reset Timer flags */ TIFR = BV(OCF2) | BV(TOV2); /* Setup Timer/Counter interrupt */ - TCCR2 = BV(WGM21) | BV(CS21) | BV(CS20); + TCCR2 = BV(WGM21) + #if TIMER_PRESCALER == 64 + | BV(CS21) | BV(CS20) + #else + #error Unsupported value of TIMER_PRESCALER + #endif + ; /* Clear on Compare match & prescaler = 64, internal sys clock. When changing prescaler change TIMER_HW_HPTICKS_PER_SEC too */ TCNT2 = 0x00; /* initialization of Timer/Counter */ @@ -153,11 +201,11 @@ TIMSK &= ~BV(TOIE2); TIMSK |= BV(OCIE2); - ENABLE_IRQRESTORE(flags); + IRQ_RESTORE(flags); } //! Frequency of the hardware high precision timer - #define TIMER_HW_HPTICKS_PER_SEC (CLOCK_FREQ / 64) + #define TIMER_HW_HPTICKS_PER_SEC (CLOCK_FREQ / TIMER_PRESCALER) INLINE hptime_t timer_hw_hpread(void) { @@ -165,11 +213,11 @@ } #else - #error Choose witch timer to use with CONFIG_TIMER_ON_TIMERx -#endif /* CONFIG_TIMER_ON_TIMERx */ + #error Unimplemented value for CONFIG_TIMER +#endif /* CONFIG_TIMER */ -#if defined(CONFIG_TIMER_ON_TIMER1_OVERFLOW) +#if (CONFIG_TIMER == TIMER_ON_OVERFLOW1) #define DEFINE_TIMER_ISR \ static void timer_handler(void) @@ -184,22 +232,6 @@ */ SIGNAL(SIG_OVERFLOW1) { - /*! - * How many overflow we have to count before calling the true timer handler. - * If timer overflow is at 24 kHz, with a value of 24 we have 1 ms between - * each call. - */ - #define TIMER1_OVF_COUNT 24 - - static uint8_t count = TIMER1_OVF_COUNT; - - count--; - if (!count) - { - timer_handler(); - count = TIMER1_OVF_COUNT; - } - #if (ARCH & ARCH_BOARD_KC) /* * Super-optimization-hack: switch CPU ADC mux here, ASAP after the start @@ -210,32 +242,68 @@ * of the handler. * * The switch is synchronized with the ADC handler using _adc_trigger_lock. + * + * Mel (A Real Programmer) */ extern uint8_t _adc_idx_next; extern bool _adc_trigger_lock; if (!_adc_trigger_lock) { - TIMER_STROBE_ON; + // Backwards compatibility fix for avr-libc 1.0.4 + #ifndef ADATE + #define ADATE ADFR + #endif + + /* + * Disable free-running mode to avoid starting a + * new conversion before the ADC handler has read + * the ongoing one. This condition could occur + * under very high interrupt load and would have the + * unwanted effect of reading from the wrong ADC + * channel. + * + * NOTE: writing 0 to ADSC and ADIF has no effect. + */ + ADCSRA = ADCSRA & ~(BV(ADATE) | BV(ADIF) | BV(ADSC)); + ADC_SETCHN(_adc_idx_next); - TIMER_STROBE_OFF; _adc_trigger_lock = true; } - #endif + #endif // ARCH_BOARD_KC + + /*! + * How many timer overflows we must count before calling the real + * timer handler. + * When the timer is programmed to overflow at 24 kHz, a value of + * 24 will result in 1ms between each call. + */ + #define TIMER1_OVF_COUNT 24 + //#warning TIMER1_OVF_COUNT for timer at 12 kHz + //#define TIMER1_OVF_COUNT 12 + + static uint8_t count = TIMER1_OVF_COUNT; + + count--; + if (!count) + { + timer_handler(); + count = TIMER1_OVF_COUNT; + } } -#elif defined (CONFIG_TIMER_ON_TIMER0) +#elif (CONFIG_TIMER == TIMER_ON_OUTPUT_COMPARE0) #define DEFINE_TIMER_ISR \ SIGNAL(SIG_OUTPUT_COMPARE0) -#elif defined(CONFIG_TIMER_ON_TIMER2) +#elif (CONFIG_TIMER == TIMER_ON_OUTPUT_COMPARE2) #define DEFINE_TIMER_ISR \ SIGNAL(SIG_OUTPUT_COMPARE2) #else - #error Choose witch timer to use with CONFIG_TIMER_ON_TIMERx -#endif /* CONFIG_TIMER_ON_TIMERx */ + #error Unimplemented value for CONFIG_TIMER +#endif /* CONFIG_TIMER */ #endif /* DRV_TIMER_AVR_H */