X-Git-Url: https://codewiz.org/gitweb?a=blobdiff_plain;f=mware%2Ffifobuf.h;h=5caf1c3a846ba12c570c53583617468f3d3c89a7;hb=9e2e47a31399e2eec24070a7467516baeb3e372c;hp=67528b97dd2170567d5abda0be9883977284fe10;hpb=ba17a56d0c988fee6a42ed2cd5a7da0625164121;p=bertos.git diff --git a/mware/fifobuf.h b/mware/fifobuf.h index 67528b97..5caf1c3a 100755 --- a/mware/fifobuf.h +++ b/mware/fifobuf.h @@ -43,6 +43,15 @@ /* * $Log$ + * Revision 1.13 2004/08/24 13:16:11 bernie + * Add type-size definitions for preprocessor. + * + * Revision 1.12 2004/08/02 20:20:29 aleph + * Merge from project_ks + * + * Revision 1.11 2004/07/30 14:15:53 rasky + * Nuovo supporto unificato per detect della CPU + * * Revision 1.10 2004/07/29 22:57:09 bernie * Doxygen fix. * @@ -184,14 +193,17 @@ INLINE void fifo_flush(FIFOBuffer *fb) } -#if !defined(__AVR__) +#if CPU_REG_BITS >= BITS_PER_PTR - /* No tricks needed on 16/32bit CPUs */ -# define fifo_isempty_locked(fb) fifo_isempty((fb)) -# define fifo_push_locked(fb, c) fifo_push((fb), (c)) -# define fifo_flush_locked(fb, c) fifo_flush((fb), (c)) + /* + * 16/32bit CPUs that can update a pointer with a single write + * operation, no need to disable interrupts. + */ + #define fifo_isempty_locked(fb) fifo_isempty((fb)) + #define fifo_push_locked(fb, c) fifo_push((fb), (c)) + #define fifo_flush_locked(fb) fifo_flush((fb)) -#else /* !__AVR__ */ +#else /* CPU_REG_BITS < BITS_PER_PTR */ /*! * Similar to fifo_isempty(), but with stronger guarantees for @@ -213,6 +225,7 @@ INLINE void fifo_flush(FIFOBuffer *fb) return result; } + /*! * Similar to fifo_push(), but with stronger guarantees for * concurrent access between user and interrupt code. @@ -229,6 +242,7 @@ INLINE void fifo_flush(FIFOBuffer *fb) ENABLE_IRQRESTORE(flags); } + /*! * Similar to fifo_flush(), but with stronger guarantees for * concurrent access between user and interrupt code. @@ -245,7 +259,7 @@ INLINE void fifo_flush(FIFOBuffer *fb) ENABLE_IRQRESTORE(flags); } -#endif /* !__AVR__ */ +#endif /* CPU_REG_BITS < BITS_PER_PTR */ /*!