Add reset controller, watchdog and memory controller I/O register definitions.
authorbatt <batt@38d2e660-2303-0410-9eaa-f027e97ec537>
Mon, 15 Oct 2007 16:02:38 +0000 (16:02 +0000)
committerbatt <batt@38d2e660-2303-0410-9eaa-f027e97ec537>
Mon, 15 Oct 2007 16:02:38 +0000 (16:02 +0000)
commit0388fff030ba7086977f6641fa1b3469b772a57b
tree8a7af48755a9164d987a7a54fa4c4238cc2cfff2
parent71956bedd3a3b40d5e2b1fed01ef921b81f8ba0f
Add reset controller, watchdog and memory controller I/O register definitions.

git-svn-id: https://src.develer.com/svnoss/bertos/trunk@881 38d2e660-2303-0410-9eaa-f027e97ec537
cpu/arm/io/at91_mc.h [new file with mode: 0644]
cpu/arm/io/at91_pmc.h
cpu/arm/io/at91_rstc.h [new file with mode: 0644]
cpu/arm/io/at91_wdt.h [new file with mode: 0644]
cpu/arm/io/at91sam7s.h