Add at91sam7s spi support. Add confing for adc.

git-svn-id: https://src.develer.com/svnoss/bertos/trunk@1183 38d2e660-2303-0410-9eaa-f027e97ec537

diff --git a/appconfig_common.h b/appconfig_common.h
index b99f02970873dddae3db32fdf1a28d20386459c5..746ff1a64d07ca6d0869195836a121a44b0c344f 100644 (file)
--- a/appconfig_common.h
+++ b/appconfig_common.h
@@ -110,13 +110,19 @@
        #define CONFIG_UART1_TXBUFSIZE  32
 
        /** [bytes] Size of the inbound FIFO buffer for port 1. */
        #define CONFIG_UART1_TXBUFSIZE  32
 
        /** [bytes] Size of the inbound FIFO buffer for port 1. */

-       #define CONFIG_UART1_RXBUFSIZE  64
+       #define CONFIG_UART1_RXBUFSIZE  CONFIG_PROTOCOL_BUFLEN

 
 

-       /** [bytes] Size of the outbound FIFO buffer for SPI port (AVR only). */
-       #define CONFIG_SPI_TXBUFSIZE    16
+       /** [bytes] Size of the outbound FIFO buffer for SPI port 0. */
+       #define CONFIG_SPI0_TXBUFSIZE   16

 
 

-       /** [bytes] Size of the inbound FIFO buffer for SPI port (AVR only). */
-       #define CONFIG_SPI_RXBUFSIZE    32
+       /** [bytes] Size of the inbound FIFO buffer for SPI port 0. */
+       #define CONFIG_SPI0_RXBUFSIZE   32
+
+       /** [bytes] Size of the outbound FIFO buffer for SPI port 1. */
+       #define CONFIG_SPI1_TXBUFSIZE   16
+
+       /** [bytes] Size of the inbound FIFO buffer for SPI port 1. */
+       #define CONFIG_SPI1_RXBUFSIZE   32

 
        /** SPI data order (AVR only). */
        #define CONFIG_SPI_DATA_ORDER   SER_MSB_FIRST
 
        /** SPI data order (AVR only). */
        #define CONFIG_SPI_DATA_ORDER   SER_MSB_FIRST


@@ -223,4 +229,17 @@
 /// Turn on or off timer support in Randpool.
 #define CONFIG_RANDPOOL_TIMER 1
 
 /// Turn on or off timer support in Randpool.
 #define CONFIG_RANDPOOL_TIMER 1
 

+/**
+ * ADC timing setting parameter
+ *
+ * - CONFIG_ADC_CLOCK is frequency clock for ADC conversion.
+ * - CONFIG_ADC_STARTUP_TIME  minimum time for startup a conversion in micro second.
+ * - CONFIG_ADC_SHTIME minimum time for sample and hold in nano second.
+ * \{
+ */
+#define CONFIG_ADC_CLOCK          4800000UL
+#define CONFIG_ADC_STARTUP_TIME        20
+#define CONFIG_ADC_SHTIME             834
+/* \} */
+

 #endif /* APPCONFIG_H */
 #endif /* APPCONFIG_H */

diff --git a/cpu/arm/drv/ser_at91.c b/cpu/arm/drv/ser_at91.c
index c617cb306a666802c68288c131de17f349fd0c97..82320bdf1ad1edc699258faa37af2cc678c1773f 100644 (file)
--- a/cpu/arm/drv/ser_at91.c
+++ b/cpu/arm/drv/ser_at91.c
@@ -551,6 +551,7 @@ static void spi0_setbaudrate(UNUSED_ARG(struct SerialHardware *, _hw), unsigned
        SPI0_CSR0 |= DIV_ROUND(CLOCK_FREQ, rate) << SPI_SCBR_SHIFT;
 }
 
        SPI0_CSR0 |= DIV_ROUND(CLOCK_FREQ, rate) << SPI_SCBR_SHIFT;
 }
 

+#if CPU_ARM_AT91SAM7X128 || CPU_ARM_AT91SAM7X256

 /* SPI driver */
 static void spi1_init(UNUSED_ARG(struct SerialHardware *, _hw), UNUSED_ARG(struct Serial *, ser))
 {
 /* SPI driver */
 static void spi1_init(UNUSED_ARG(struct SerialHardware *, _hw), UNUSED_ARG(struct Serial *, ser))
 {


@@ -633,6 +634,7 @@ static void spi1_setbaudrate(UNUSED_ARG(struct SerialHardware *, _hw), unsigned
        ASSERT((uint8_t)DIV_ROUND(CLOCK_FREQ, rate));
        SPI1_CSR0 |= DIV_ROUND(CLOCK_FREQ, rate) << SPI_SCBR_SHIFT;
 }
        ASSERT((uint8_t)DIV_ROUND(CLOCK_FREQ, rate));
        SPI1_CSR0 |= DIV_ROUND(CLOCK_FREQ, rate) << SPI_SCBR_SHIFT;
 }

+#endif

 
 static void spi_setparity(UNUSED_ARG(struct SerialHardware *, _hw), UNUSED_ARG(int, parity))
 {
 
 static void spi_setparity(UNUSED_ARG(struct SerialHardware *, _hw), UNUSED_ARG(int, parity))
 {