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inline | side by side (from parent 1:
3c02ba5)
#define EDGE_FOUND(bitline) BIT_DIFFER((bitline), (bitline) >> 1)
#define EDGE_FOUND(bitline) BIT_DIFFER((bitline), (bitline) >> 1)
-static void hdlc_parse(Afsk *af, bool bit)
+static void hdlc_parse(Hdlc *hdlc, bool bit, FIFOBuffer *fifo)
- af->hdlc_demod_bits <<= 1;
- af->hdlc_demod_bits |= bit ? 1 : 0;
+ hdlc->demod_bits <<= 1;
+ hdlc->demod_bits |= bit ? 1 : 0;
- if (af->hdlc_demod_bits == HDLC_FLAG)
+ if (hdlc->demod_bits == HDLC_FLAG)
- if (!fifo_isfull(&af->rx_fifo))
+ if (!fifo_isfull(fifo))
- fifo_push(&af->rx_fifo, HDLC_FLAG);
- af->hdlc_rxstart = true;
+ fifo_push(fifo, HDLC_FLAG);
+ hdlc->rxstart = true;
- af->hdlc_rxstart = false;
- af->hdlc_currchar = 0;
- af->hdlc_bit_idx = 0;
+ hdlc->currchar = 0;
+ hdlc->bit_idx = 0;
- if ((af->hdlc_demod_bits & HDLC_RESET) == HDLC_RESET)
+ if ((hdlc->demod_bits & HDLC_RESET) == HDLC_RESET)
- af->hdlc_rxstart = false;
return;
/* Stuffed bit */
return;
/* Stuffed bit */
- if ((af->hdlc_demod_bits & 0x3f) == 0x3e)
+ if ((hdlc->demod_bits & 0x3f) == 0x3e)
- if (af->hdlc_demod_bits & 0x01)
- af->hdlc_currchar |= 0x80;
+ if (hdlc->demod_bits & 0x01)
+ hdlc->currchar |= 0x80;
- if (++af->hdlc_bit_idx >= 8)
+ if (++hdlc->bit_idx >= 8)
- if ((af->hdlc_currchar == HDLC_FLAG
- || af->hdlc_currchar == HDLC_RESET
- || af->hdlc_currchar == AX25_ESC))
+ if ((hdlc->currchar == HDLC_FLAG
+ || hdlc->currchar == HDLC_RESET
+ || hdlc->currchar == AX25_ESC))
- if (!fifo_isfull(&af->rx_fifo))
- fifo_push(&af->rx_fifo, AX25_ESC);
+ if (!fifo_isfull(fifo))
+ fifo_push(fifo, AX25_ESC);
- af->hdlc_rxstart = false;
- if (!fifo_isfull(&af->rx_fifo))
- fifo_push(&af->rx_fifo, af->hdlc_currchar);
+ if (!fifo_isfull(fifo))
+ fifo_push(fifo, hdlc->currchar);
- af->hdlc_rxstart = false;
- af->hdlc_currchar = 0;
- af->hdlc_bit_idx = 0;
+ hdlc->currchar = 0;
+ hdlc->bit_idx = 0;
- af->hdlc_currchar >>= 1;
}
void afsk_adc_isr(Afsk *af, int8_t curr_sample)
}
void afsk_adc_isr(Afsk *af, int8_t curr_sample)
* NRZI coding: if 2 consecutive bits have the same value
* a 1 is received, otherwise it's a 0.
*/
* NRZI coding: if 2 consecutive bits have the same value
* a 1 is received, otherwise it's a 0.
*/
- hdlc_parse(af, !EDGE_FOUND(af->found_bits));
+ hdlc_parse(&af->hdlc, !EDGE_FOUND(af->found_bits), &af->rx_fifo);
#define SAMPLEPERBIT (SAMPLERATE / BITRATE)
#define SAMPLEPERBIT (SAMPLERATE / BITRATE)
+/**
+ * HDLC (High-Level Data Link Control) context.
+ * Maybe to be moved in a separate HDLC module one day.
+ */
+typedef struct Hdlc
+{
+ uint8_t demod_bits; ///< Bitstream from the demodulator.
+ uint8_t bit_idx; ///< Current received bit.
+ uint8_t currchar; ///< Current received character.
+ bool rxstart; ///< True if an HDLC_FLAG char has been found in the bitstream.
+} Hdlc;
+
+/**
+ * AFSK1200 modem context.
+ */
+ /** ADC channel to be used by the demodulator */
+
+ /** DAC channel to be used by the modulator */
int dac_ch;
/** Current sample of bit for output data. */
int dac_ch;
/** Current sample of bit for output data. */
*/
int8_t delay_buf[SAMPLEPERBIT / 2 + 1];
*/
int8_t delay_buf[SAMPLEPERBIT / 2 + 1];
+ /** FIFO for received data */
+
+ /** FIFO rx buffer */
uint8_t rx_buf[CONFIG_AFSK_RX_BUFLEN];
uint8_t rx_buf[CONFIG_AFSK_RX_BUFLEN];
+ /** FIFO for transmitted data */
+
+ /** FIFO tx buffer */
uint8_t tx_buf[CONFIG_AFSK_TX_BUFLEN];
uint8_t tx_buf[CONFIG_AFSK_TX_BUFLEN];
+ /** IIR filter X cells, used to filter sampled data by the demodulator */
+
+ /** IIR filter Y cells, used to filter sampled data by the demodulator */
+ /**
+ * Bits sampled by the demodulator are here.
+ * Since ADC samplerate is higher than the bitrate, the bits here are
+ * SAMPLEPERBIT times the bitrate.
+ */
+
+ /**
+ * Current phase, needed to know when the bitstream at ADC speed
+ * should be sampled.
+ */
- /* True while modem sends data */
- volatile bool sending;
+ /** Bits found by the demodulator at the correct bitrate speed. */
+ uint8_t found_bits;
+ /** True while modem sends data */
+ volatile bool sending;
- bool hdlc_rxstart;
- uint8_t hdlc_currchar;
- uint8_t hdlc_bit_idx;
- uint8_t hdlc_demod_bits;
+ /** Hdlc context */
+ Hdlc hdlc;
+ /**
+ * Preamble length.
+ * When the AFSK modem wants to send data, before sending the actual data,
+ * shifts out preamble_len HDLC_FLAG characters.
+ * This helps to synchronize the demodulator filters on the receiver side.
+ */
+
+ /**
+ * Preamble length.
+ * After sending the actual data, the AFSK shifts out
+ * trailer_len HDLC_FLAG characters.
+ * This helps to synchronize the demodulator filters on the receiver side.
+ */
uint16_t trailer_len;
} Afsk;
uint16_t trailer_len;
} Afsk;