#define HW_ADC_H
#include <drv/adc.h>
#define HW_ADC_H
#include <drv/adc.h>
+#include <drv/clock_lm3s.h>
/* Enable ADC0 clock */
SYSCTL_RCGC0_R |= SYSCTL_RCGC0_ADC0;
/* Enable ADC0 clock */
SYSCTL_RCGC0_R |= SYSCTL_RCGC0_ADC0;
- /* Why this??? */
- timer_udelay(1);
+ /*
+ * We wait some time because the clock is istable
+ * and that could cause system hardfault
+ */
+ lm3s_busyWait(10);
/* Disable all sequence */
HWREG(ADC0_BASE + ADC_O_ACTSS) = 0;
/* Disable all sequence */
HWREG(ADC0_BASE + ADC_O_ACTSS) = 0;