rit128x96: small code optimizations.

git-svn-id: https://src.develer.com/svnoss/bertos/trunk@3431 38d2e660-2303-0410-9eaa-f027e97ec537

diff --git a/bertos/drv/lcd_rit128x96.c b/bertos/drv/lcd_rit128x96.c
index dc98055a68ddf0351abbc603ba450b119bdfbd12..9922b6af77dc994cbfd1399235d20d01562d091c 100644 (file)
--- a/bertos/drv/lcd_rit128x96.c
+++ b/bertos/drv/lcd_rit128x96.c
@@ -106,11 +106,7 @@ static const uint8_t horizontal_inc[] =
 static void lcd_dataWrite(const uint8_t *buf, size_t count)
 {
        while (count--)
-       {
                LCD_WRITE(*buf++);
-               /* Dummy read to drain the FIFO */
-               (void)LCD_READ;
-       }
 }
 
 /* Turn on the OLED display */
@@ -135,7 +131,7 @@ void rit128x96_lcd_off(void)
 void rit128x96_lcd_blitBitmap(const Bitmap *bm)
 {
        uint8_t lcd_row[bm->width / 2];
-       uint8_t buffer[8];
+       uint8_t buffer[3];
        uint8_t mask;
        int i, l;
 

diff --git a/bertos/hw/hw_rit128x96.h b/bertos/hw/hw_rit128x96.h
index d1435f62c0ac3ba16821dd70435d0038821e9b03..f9c2291a870e6f098d367c5e8539e995cf92a651 100644 (file)
--- a/bertos/hw/hw_rit128x96.h
+++ b/bertos/hw/hw_rit128x96.h
@@ -68,9 +68,6 @@
 
 /* Send data to the display */
 #define LCD_WRITE(x)    ((void)x)/* Implement me! */
-
-/* Read data from the display */
-#define LCD_READ        (0 /* Implement me! */ )
 /*@}*/
 
 INLINE void lcd_bus_init(void)

diff --git a/examples/lm3s1968/hw/hw_rit128x96.h b/examples/lm3s1968/hw/hw_rit128x96.h
index 495c2e564a260f3d6883f22e26ae63b0555346c5..6e1c933c9f261440af80d75fd2c0c604965c5721 100644 (file)
--- a/examples/lm3s1968/hw/hw_rit128x96.h
+++ b/examples/lm3s1968/hw/hw_rit128x96.h
@@ -73,24 +73,20 @@
        lm3s_gpioPinWrite(GPIO_PORTH_BASE, GPIO_OLEDDC_PIN, GPIO_OLEDDC_PIN)
 
 /* Send data to the display */
-#define LCD_WRITE(x)   lm3s_ssiWriteFrame(SSI0_BASE, x)
-
-/* Read data from the display */
-#define LCD_READ                                       \
-       ({                                              \
-               uint32_t frame;                         \
-               lm3s_ssiReadFrame(SSI0_BASE, &frame);   \
-               frame;                                  \
-       })
+#define LCD_WRITE(x)                                                   \
+       {                                                               \
+               uint32_t _x;                                            \
+               lm3s_ssiWriteFrame(SSI0_BASE, x);                       \
+               /* Dummy read to drain the FIFO */                      \
+               while (!lm3s_ssiReadFrameNonBlocking(SSI0_BASE, &_x));  \
+                       cpu_relax();                                    \
+       }
 /*@}*/
 
 INLINE void lcd_bus_init(void)
 {
-       cpu_flags_t flags;
        uint32_t dummy;
 
-       IRQ_SAVE_DISABLE(flags);
-
        /* Enable the peripheral clock */
        SYSCTL_RCGC1_R |= SYSCTL_RCGC1_SSI0;
        SYSCTL_RCGC2_R |= SYSCTL_RCGC2_GPIOA;
@@ -122,8 +118,6 @@ INLINE void lcd_bus_init(void)
 
        /* Drain the SSI RX FIFO */
        while (lm3s_ssiReadFrameNonBlocking(SSI0_BASE, &dummy));
-
-       IRQ_RESTORE(flags);
 }
 
 #endif /* HW_RIT128x96_H */