Add support for ATmega2560.
authorlottaviano <lottaviano@38d2e660-2303-0410-9eaa-f027e97ec537>
Thu, 23 Dec 2010 18:50:44 +0000 (18:50 +0000)
committerlottaviano <lottaviano@38d2e660-2303-0410-9eaa-f027e97ec537>
Thu, 23 Dec 2010 18:50:44 +0000 (18:50 +0000)
Signed-off-by: Brian Fiegel <bfiegel@engineerweb.org>
Reviewed-by: Luca Ottaviano <lottaviano@develer.com>
git-svn-id: https://src.develer.com/svnoss/bertos/trunk@4655 38d2e660-2303-0410-9eaa-f027e97ec537

bertos/cpu/attr.h
bertos/cpu/avr/drv/adc_avr.c
bertos/cpu/avr/drv/adc_avr.h
bertos/cpu/avr/drv/i2c_avr.c
bertos/cpu/avr/drv/kdebug_avr.c
bertos/cpu/avr/drv/ser_avr.c
bertos/cpu/avr/drv/ser_avr.h
bertos/cpu/avr/drv/timer_avr.c
bertos/cpu/avr/drv/timer_avr.h
bertos/cpu/detect.h

index 8b1fa4c7c15e1b99eb7e5a6fedb3958a289ca9bb..c8090f955c021828db2cf242149bcd64b9b82e84 100644 (file)
                #define CPU_RAM_START       0x60
        #elif CPU_AVR_ATMEGA64 || CPU_AVR_ATMEGA128 || CPU_AVR_ATMEGA168 || CPU_AVR_ATMEGA328P
                #define CPU_RAM_START       0x100
-       #elif CPU_AVR_ATMEGA1281 || CPU_AVR_ATMEGA1280
+       #elif CPU_AVR_ATMEGA1281 || CPU_AVR_ATMEGA1280 || CPU_AVR_ATMEGA2560
                #define CPU_RAM_START       0x200
        #else
                #warning Fix CPU_RAM_START address for your AVR, default value set to 0x100
index c42f8e3ba4f9c6ae67db243790e8542f38883575..51c81caca5d0ee13b9fd3e9304abb40ce56f7484 100644 (file)
@@ -102,9 +102,9 @@ void adc_hw_select_ch(uint8_t ch)
        #if CPU_AVR_ATMEGA8 || CPU_AVR_ATMEGA328P || CPU_AVR_ATMEGA168
                ADMUX &= ~(BV(MUX3) | BV(MUX2) | BV(MUX1) | BV(MUX0));
        #elif CPU_AVR_ATMEGA32 || CPU_AVR_ATMEGA64 || CPU_AVR_ATMEGA128 || CPU_AVR_ATMEGA1281 \
-             || CPU_AVR_ATMEGA1280
+             || CPU_AVR_ATMEGA1280 || CPU_AVR_ATMEGA2560
                ADMUX &= ~(BV(MUX4) | BV(MUX3) | BV(MUX2) | BV(MUX1) | BV(MUX0));
-               #if CPU_AVR_ATMEGA1280
+               #if CPU_AVR_ATMEGA1280 || CPU_AVR_ATMEGA2560
                        ADCSRB &= ~(BV(MUX5));
                #endif
        #else
@@ -114,7 +114,7 @@ void adc_hw_select_ch(uint8_t ch)
        /* Select channel, only first 8 channel modes are supported */
        ADMUX |= (ch & 0x07);
 
-       #if CPU_AVR_ATMEGA1280
+       #if CPU_AVR_ATMEGA1280 || CPU_AVR_ATMEGA2560
                /* Select channel, all 16 channels are supported */
                if (ch > 0x07)
                        ADCSRB |= BV(MUX5);
index c42cf324cdfce00d5bea42c895efd6d3b7e119bf..6c77ca3d03c6e485c8c043379677ff95aec7f8a0 100644 (file)
@@ -39,7 +39,7 @@
 
 #include <cfg/compiler.h>
 
-#if CPU_AVR_ATMEGA1280
+#if CPU_AVR_ATMEGA1280 || CPU_AVR_ATMEGA2560
        /* 16 channels aivailable */
        #define ADC_MUX_MAXCH 15
 #else
index 918d2758cf07a6121f865b498df5b4ffe12f8369..eb8b8da90d90a6c05aa01935c721014e59947e9b 100644 (file)
@@ -384,7 +384,7 @@ void i2c_hw_init(I2c *i2c, int dev, uint32_t clock)
                 * probably due to some unwanted interaction between the
                 * port pin and the TWI lines.
                 */
-       #if CPU_AVR_ATMEGA64 || CPU_AVR_ATMEGA128 || CPU_AVR_ATMEGA1281 || CPU_AVR_ATMEGA1280
+       #if CPU_AVR_ATMEGA64 || CPU_AVR_ATMEGA128 || CPU_AVR_ATMEGA1281 || CPU_AVR_ATMEGA1280 || CPU_AVR_ATMEGA2560
                PORTD |= BV(PD0) | BV(PD1);
                DDRD  |= BV(PD0) | BV(PD1);
        #elif CPU_AVR_ATMEGA8
index 5a8d2f3157b31ed5f8c214f805ad381ae14a4a9a..8fa1a4bff62c5fdd27366d267248447661a01989 100644 (file)
@@ -73,7 +73,7 @@
        #endif
 
        #if CPU_AVR_ATMEGA64 || CPU_AVR_ATMEGA128 || CPU_AVR_ATMEGA1281 || CPU_AVR_ATMEGA1280 \
-           || CPU_AVR_ATMEGA168 || CPU_AVR_ATMEGA328P
+           || CPU_AVR_ATMEGA168 || CPU_AVR_ATMEGA328P || CPU_AVR_ATMEGA2560
                #define UCR UCSR0B
                #define UDR UDR0
                #define USR UCSR0A
@@ -330,7 +330,7 @@ INLINE void kdbg_hw_init(void)
                                #error CONFIG_KDEBUG_PORT must be either 0 or 1
                        #endif
 
-               #elif CPU_AVR_ATMEGA1280
+               #elif CPU_AVR_ATMEGA1280 || CPU_AVR_ATMEGA2560
                        #if CONFIG_KDEBUG_PORT == 0
                                UBRR0H = (uint8_t)(period>>8);
                                UBRR0L = (uint8_t)period;
index a4328f41b8552b60af93b6919b098484969672d3..7f8cf932c2bd8f6cbd8d219d19988aa37a02cccc 100644 (file)
@@ -74,7 +74,7 @@
        /*\}*/
 #endif
 
-#if CPU_AVR_ATMEGA1281 || CPU_AVR_ATMEGA1280
+#if CPU_AVR_ATMEGA1281 || CPU_AVR_ATMEGA1280 || CPU_AVR_ATMEGA2560
        #define BIT_RXCIE0 RXCIE0
        #define BIT_RXEN0  RXEN0
        #define BIT_TXEN0  TXEN0
@@ -84,7 +84,7 @@
        #define BIT_RXEN1  RXEN1
        #define BIT_TXEN1  TXEN1
        #define BIT_UDRIE1 UDRIE1
-       #if CPU_AVR_ATMEGA1280
+       #if CPU_AVR_ATMEGA1280 || CPU_AVR_ATMEGA2560
                #define BIT_RXCIE2 RXCIE2
                #define BIT_RXEN2  RXEN2
                #define BIT_TXEN2  TXEN2
 
 /* SPI port and pin configuration */
 #if CPU_AVR_ATMEGA64 || CPU_AVR_ATMEGA128 || CPU_AVR_ATMEGA103 || CPU_AVR_ATMEGA1281 \
-    || CPU_AVR_ATMEGA1280
+    || CPU_AVR_ATMEGA1280 || CPU_AVR_ATMEGA2560
        #define SPI_PORT      PORTB
        #define SPI_DDR       DDRB
        #define SPI_SS_BIT    PB0
 #endif
 
 /* USART register definitions */
-#if CPU_AVR_ATMEGA1280
+#if CPU_AVR_ATMEGA1280 || CPU_AVR_ATMEGA2560
        #define AVR_HAS_UART1 1
        #define AVR_HAS_UART2 1
        #define AVR_HAS_UART3 1
index 36d3a6f8fc04f766f64f531640b8f55108f12831..68d5e5085ee639fd3c14d469b01caaf323446afa 100644 (file)
@@ -86,7 +86,7 @@ typedef uint8_t serstatus_t;
  */
 enum
 {
-#if  CPU_AVR_ATMEGA1280
+#if  CPU_AVR_ATMEGA1280 || CPU_AVR_ATMEGA2560
        SER_UART0,
        SER_UART1,
        SER_UART2,
index 5decb0483b74afe578a5af86dff782dcf740b1a9..ee63e76f8d419846eca22e64845a8f3d527a4556 100644 (file)
 
 #include <avr/io.h>
 
-#if CPU_AVR_ATMEGA1281 || CPU_AVR_ATMEGA1280 || CPU_AVR_ATMEGA168 || CPU_AVR_ATMEGA328P
+#if CPU_AVR_ATMEGA1281 || CPU_AVR_ATMEGA1280 || CPU_AVR_ATMEGA168 || CPU_AVR_ATMEGA328P || CPU_AVR_ATMEGA2560
        #define REG_TIFR0 TIFR0
        #define REG_TIFR1 TIFR1
        #define REG_TIFR2 TIFR2
-       #if CPU_AVR_ATMEGA1281 || CPU_AVR_ATMEGA1280
+       #if CPU_AVR_ATMEGA1281 || CPU_AVR_ATMEGA1280 || CPU_AVR_ATMEGA2560
                #define REG_TIFR3 TIFR3
        #endif
 
        #define REG_TIMSK0 TIMSK0
        #define REG_TIMSK1 TIMSK1
        #define REG_TIMSK2 TIMSK2
-       #if CPU_AVR_ATMEGA1281 || CPU_AVR_ATMEGA1280
+       #if CPU_AVR_ATMEGA1281 || CPU_AVR_ATMEGA1280 || CPU_AVR_ATMEGA2560
                #define REG_TIMSK3 TIMSK3
        #endif
 
index e497c91930830cb90550716b71d1d104b21c296a..2146620c943674e1dd939051b1467d3f3bfb15b8 100644 (file)
@@ -72,7 +72,7 @@
 
        #define TIMER_PRESCALER      64
        #define TIMER_HW_BITS        8
-       #if CPU_AVR_ATMEGA1281 || CPU_AVR_ATMEGA1280 || CPU_AVR_ATMEGA168 || CPU_AVR_ATMEGA328P
+       #if CPU_AVR_ATMEGA1281 || CPU_AVR_ATMEGA1280 || CPU_AVR_ATMEGA168 || CPU_AVR_ATMEGA328P || CPU_AVR_ATMEGA2560
                #define DEFINE_TIMER_ISR     DECLARE_ISR_CONTEXT_SWITCH(TIMER0_COMPA_vect)
        #else
                #define DEFINE_TIMER_ISR     DECLARE_ISR_CONTEXT_SWITCH(TIMER0_COMP_vect)
 
        #define TIMER_PRESCALER      64
        #define TIMER_HW_BITS        8
-       #if CPU_AVR_ATMEGA1281 || CPU_AVR_ATMEGA1280 || CPU_AVR_ATMEGA168 || CPU_AVR_ATMEGA328P
+       #if CPU_AVR_ATMEGA1281 || CPU_AVR_ATMEGA1280 || CPU_AVR_ATMEGA168 || CPU_AVR_ATMEGA328P || CPU_AVR_ATMEGA2560
                #define DEFINE_TIMER_ISR     DECLARE_ISR_CONTEXT_SWITCH(TIMER2_COMPA_vect)
        #else
                #define DEFINE_TIMER_ISR     DECLARE_ISR_CONTEXT_SWITCH(TIMER2_COMP_vect)
index ce462b2ea4b441f1b770a7c9a034cfac5450422b..e14ca222a7b57ce138c0f0dc1dd0a88a59e65285 100644 (file)
                #define CPU_AVR_ATMEGA1280  0
        #endif
 
+       #if defined(__AVR_ATmega2560__)
+               #define CPU_AVR_ATMEGA2560  1
+               #define CPU_NAME            "ATmega2560"
+       #else
+               #define CPU_AVR_ATMEGA2560  0
+       #endif
+
        #if CPU_AVR_ATMEGA32 + CPU_AVR_ATMEGA64 + CPU_AVR_ATMEGA103 + CPU_AVR_ATMEGA128 \
          + CPU_AVR_ATMEGA8 + CPU_AVR_ATMEGA168 + CPU_AVR_ATMEGA328P + CPU_AVR_ATMEGA1281 \
-         + CPU_AVR_ATMEGA1280 != 1
+         + CPU_AVR_ATMEGA1280 + CPU_AVR_ATMEGA2560 != 1
                #error AVR CPU configuration error
        #endif
 #else
        #define CPU_AVR_ATMEGA128       0
        #define CPU_AVR_ATMEGA1281      0
        #define CPU_AVR_ATMEGA1280      0
+       #define CPU_AVR_ATMEGA2560      0
 #endif
 
 #if defined (__MSP430__)