static void i2c_bitbang_stop_1(struct I2c *i2c)
{
- i2c_hw_sdaLo(I2C_DEV(i2c));
- i2c_hw_sclHi(I2C_DEV(i2c));
- i2c_hw_halfbitDelay(I2C_DEV(i2c));
- i2c_hw_sdaHi(I2C_DEV(i2c));
+ i2c_sdaLo(I2C_DEV(i2c));
+ i2c_sclHi(I2C_DEV(i2c));
+ i2c_halfbitDelay(I2C_DEV(i2c));
+ i2c_sdaHi(I2C_DEV(i2c));
}
INLINE bool i2c_bitbang_start_1(struct I2c *i2c)
{
- i2c_hw_sdaHi(I2C_DEV(i2c));
- i2c_hw_sclHi(I2C_DEV(i2c));
- i2c_hw_halfbitDelay(I2C_DEV(i2c));
- i2c_hw_sdaLo(I2C_DEV(i2c));
- i2c_hw_halfbitDelay(I2C_DEV(i2c));
+ i2c_sdaHi(I2C_DEV(i2c));
+ i2c_sclHi(I2C_DEV(i2c));
+ i2c_halfbitDelay(I2C_DEV(i2c));
+ i2c_sdaLo(I2C_DEV(i2c));
+ i2c_halfbitDelay(I2C_DEV(i2c));
- return !i2c_hw_sdaIn(I2C_DEV(i2c));
+ return !i2c_sdaIn(I2C_DEV(i2c));
}
uint8_t data = 0;
for (uint8_t i = 0x80; i != 0; i >>= 1)
{
- i2c_hw_sclLo(I2C_DEV(i2c));
- i2c_hw_halfbitDelay(I2C_DEV(i2c));
- i2c_hw_sclHi(I2C_DEV(i2c));
- if (i2c_hw_sdaIn(I2C_DEV(i2c)))
+ i2c_sclLo(I2C_DEV(i2c));
+ i2c_halfbitDelay(I2C_DEV(i2c));
+ i2c_sclHi(I2C_DEV(i2c));
+ if (i2c_sdaIn(I2C_DEV(i2c)))
data |= i;
else
data &= ~i;
- i2c_hw_halfbitDelay(I2C_DEV(i2c));
+ i2c_halfbitDelay(I2C_DEV(i2c));
}
- i2c_hw_sclLo(I2C_DEV(i2c));
+ i2c_sclLo(I2C_DEV(i2c));
/* Generate ACK/NACK */
if (i2c->xfer_size > 1)
- i2c_hw_sdaLo(I2C_DEV(i2c));
+ i2c_sdaLo(I2C_DEV(i2c));
else
- i2c_hw_sdaHi(I2C_DEV(i2c));
+ i2c_sdaHi(I2C_DEV(i2c));
- i2c_hw_halfbitDelay(I2C_DEV(i2c));
- i2c_hw_sclHi(I2C_DEV(i2c));
- i2c_hw_halfbitDelay(I2C_DEV(i2c));
- i2c_hw_sclLo(I2C_DEV(i2c));
- i2c_hw_sdaHi(I2C_DEV(i2c));
+ i2c_halfbitDelay(I2C_DEV(i2c));
+ i2c_sclHi(I2C_DEV(i2c));
+ i2c_halfbitDelay(I2C_DEV(i2c));
+ i2c_sclLo(I2C_DEV(i2c));
+ i2c_sdaHi(I2C_DEV(i2c));
/* Generate stop condition (if requested) */
if ((i2c->xfer_size == 1) && (i2c->flags & I2C_STOP))
for (uint16_t i = 0x100; i != 0; i >>= 1)
{
- i2c_hw_sclLo(I2C_DEV(i2c));
+ i2c_sclLo(I2C_DEV(i2c));
if (data & i)
- i2c_hw_sdaHi(I2C_DEV(i2c));
+ i2c_sdaHi(I2C_DEV(i2c));
else
- i2c_hw_sdaLo(I2C_DEV(i2c));
- i2c_hw_halfbitDelay(I2C_DEV(i2c));
+ i2c_sdaLo(I2C_DEV(i2c));
+ i2c_halfbitDelay(I2C_DEV(i2c));
- i2c_hw_sclHi(I2C_DEV(i2c));
- i2c_hw_halfbitDelay(I2C_DEV(i2c));
+ i2c_sclHi(I2C_DEV(i2c));
+ i2c_halfbitDelay(I2C_DEV(i2c));
}
- bool ack = !i2c_hw_sdaIn(I2C_DEV(i2c));
- i2c_hw_sclLo(I2C_DEV(i2c));
- i2c_hw_halfbitDelay(I2C_DEV(i2c));
+ bool ack = !i2c_sdaIn(I2C_DEV(i2c));
+ i2c_sclLo(I2C_DEV(i2c));
+ i2c_halfbitDelay(I2C_DEV(i2c));
if (!ack)
{
i2c->hw = (struct I2cHardware *)(dev - I2C_BITBANG0);
i2c->vt = &i2c_bitbang_vt;
- i2c_hw_bitbang_init(I2C_DEV(i2c));
- i2c_hw_sdaHi(I2C_DEV(i2c));
- i2c_hw_sclHi(I2C_DEV(i2c));
+ i2c_bitbang_init(I2C_DEV(i2c));
+ i2c_sdaHi(I2C_DEV(i2c));
+ i2c_sclHi(I2C_DEV(i2c));
}
*/
#include <cfg/compiler.h>
-INLINE void i2c_hw_sdaHi(int dev)
+INLINE void i2c_sdaHi(int dev)
{
(void)(dev);
/* Implement me:Set SDA High by setting SDA pin as input */
}
-INLINE void i2c_hw_sdaLo(int dev)
+INLINE void i2c_sdaLo(int dev)
{
(void)(dev);
/* Implement me:Set SDA Low by setting SDA pin as open collector output */
}
-INLINE void i2c_hw_sclHi(int dev)
+INLINE void i2c_sclHi(int dev)
{
(void)(dev);
/* Implement me:Set SCL High by setting SCL pin as input */
}
-INLINE void i2c_hw_sclLo(int dev)
+INLINE void i2c_sclLo(int dev)
{
(void)(dev);
/* Implement me:Set SCL Low by setting SCL pin as open collector output */
}
-INLINE bool i2c_hw_sdaIn(int dev)
+INLINE bool i2c_sdaIn(int dev)
{
(void)(dev);
/* Implement me: read SDA pin state */
return true;
}
-INLINE bool i2c_hw_sclIn(int dev)
+INLINE bool i2c_sclIn(int dev)
{
(void)(dev);
/* Implement me: read SCL pin state */
/**
* Half bit delay routine used to generate the correct timings.
*/
-INLINE void i2c_hw_halfbitDelay(int dev)
+INLINE void i2c_halfbitDelay(int dev)
{
(void)(dev);
/* Implement me! */
/**
* This macro should set SDA and SCL lines as input.
*/
-INLINE void i2c_hw_bitbang_init(int dev)
+INLINE void i2c_bitbang_init(int dev)
{
(void)(dev);
/* Implement me! */