lm3s1968: enlarge the stack size of the main process to 1K.

git-svn-id: https://src.develer.com/svnoss/bertos/trunk@3357 38d2e660-2303-0410-9eaa-f027e97ec537

diff --git a/bertos/cpu/cortex-m3/hw/startup_lm3s.c b/bertos/cpu/cortex-m3/hw/startup_lm3s.c
index 279f14ce69d4fb4043f04da8ccb16d9cf147eda6..2e985f6425c03bdccb327887a3f4559f2e4a3f43 100644 (file)
--- a/bertos/cpu/cortex-m3/hw/startup_lm3s.c
+++ b/bertos/cpu/cortex-m3/hw/startup_lm3s.c
@@ -41,13 +41,13 @@
 #include "drv/clock_lm3s.h"
 #include "io/lm3s.h"
 
-extern size_t _etext, __data_start, __data_end,
-               __bss_start, __bss_end, __stack_irq_end;
+extern size_t __text_end, __data_start, __data_end,
+               __bss_start, __bss_end, __stack_end;
 
 extern int main(void);
 
 /* Architecture's entry point */
-static void NORETURN _entry(void)
+static void NORETURN NAKED _entry(void)
 {
        size_t *src, *dst;
 
@@ -76,7 +76,7 @@ static void NORETURN _entry(void)
        clock_set_rate();
 
        /* Copy the data segment initializers from flash to SRAM */
-       src = &_etext;
+       src = &__text_end;
        for (dst = &__data_start; dst < &__data_end ; )
                *dst++ = *src++;
 
@@ -92,27 +92,18 @@ static void NORETURN _entry(void)
        UNREACHABLE();
 }
 
-static void nmi_isr(void)
+static void NORETURN NAKED default_isr(void)
 {
-       ASSERT(0);
-}
-
-static void fault_isr(void)
-{
-       ASSERT(0);
-}
-
-static void default_isr(void)
-{
-       ASSERT(0);
+       PAUSE;
+       UNREACHABLE();
 }
 
 /* Startup vector table */
 static void (* const irq_vectors[])(void) __attribute__ ((section(".vectors"))) = {
-       (void (*)(void))&__stack_irq_end,       /* Initial stack pointer */
+       (void (*)(void))&__stack_end,   /* Initial stack pointer */
        _entry,         /* The reset handler */
-       nmi_isr,        /* The NMI handler */
-       fault_isr,      /* The hard fault handler */
+       default_isr,    /* The NMI handler */
+       default_isr,    /* The hard fault handler */
        default_isr,    /* The MPU fault handler */
        default_isr,    /* The bus fault handler */
        default_isr,    /* The usage fault handler */

diff --git a/bertos/cpu/cortex-m3/scripts/lm3s1968_rom.ld b/bertos/cpu/cortex-m3/scripts/lm3s1968_rom.ld
index 57a9ba9ae1661acf8418d9d820461170f0d2cfcb..b93a49f104ea25d38cdbc33935e83a0fc0acb9f2 100644 (file)
--- a/bertos/cpu/cortex-m3/scripts/lm3s1968_rom.ld
+++ b/bertos/cpu/cortex-m3/scripts/lm3s1968_rom.ld
@@ -49,15 +49,10 @@ MEMORY
   ram(rwx) : org = 0x20000000, len = 64k
 }
 
-
 /*
  * Define stack size here
  */
-FIQ_STACK_SIZE = 0x0100;
-IRQ_STACK_SIZE = 0x0100;
-ABT_STACK_SIZE = 0x0100;
-UND_STACK_SIZE = 0x0100;
-SVC_STACK_SIZE = 0x0400;
+MAIN_STACK_SIZE = 0x0400;
 
 /*
  * Allocate section memory
@@ -80,10 +75,10 @@ SECTIONS
                . = ALIGN(4);
        } > rom
 
-       _etext = .;
-       PROVIDE (__etext = .);
+       __text_end = .;
+       PROVIDE (__text_end = .);
 
-       .data : AT (_etext)
+       .data : AT (__text_end)
        {
                PROVIDE (__data_start = .);
                *(vtable)
@@ -109,33 +104,10 @@ SECTIONS
         * Data heap is allocate at end of stack.
         */
        PROVIDE (__stack_start = .);
-
-       PROVIDE (__stack_fiq_start = .);
-       . += FIQ_STACK_SIZE;
-       . = ALIGN(4);
-       PROVIDE (__stack_fiq_end = .);
-
-       PROVIDE (__stack_irq_start = .);
-       . += IRQ_STACK_SIZE;
-       . = ALIGN(4);
-       PROVIDE (__stack_irq_end = .);
-
-       PROVIDE (__stack_abt_start = .);
-       . += ABT_STACK_SIZE;
        . = ALIGN(4);
-       PROVIDE (__stack_abt_end = .);
-
-       PROVIDE (__stack_und_start = .);
-       . += UND_STACK_SIZE;
-       . = ALIGN(4);
-       PROVIDE (__stack_und_end = .);
-
-       PROVIDE (__stack_svc_start = .);
-       . += SVC_STACK_SIZE;
-       . = ALIGN(4);
-       PROVIDE (__stack_svc_end = .);
-
+       . += MAIN_STACK_SIZE;
        PROVIDE (__stack_end = .);
 
        PROVIDE (__heap_start = .);
+       . = ALIGN(4);
 }