Set correct debug pins for AT91SAM7X.

git-svn-id: https://src.develer.com/svnoss/bertos/trunk@1078 38d2e660-2303-0410-9eaa-f027e97ec537

diff --git a/cpu/arm/drv/kdebug_at91.c b/cpu/arm/drv/kdebug_at91.c
index 64b3845f37ea3a07dafec6cf694a3abaf2646939..b7e24cd3cc38e7c836543f8aa637f33eaf3635b1 100644 (file)
--- a/cpu/arm/drv/kdebug_at91.c
+++ b/cpu/arm/drv/kdebug_at91.c
@@ -76,23 +76,16 @@ INLINE void kdbg_hw_init(void)
                DBGU_MR =  US_CHMODE_NORMAL | US_CHRL_8 | US_PAR_NO | US_NBSTOP_1;
                /* Enable DBGU transmitter. */
                DBGU_CR = BV(US_TXEN);
-               #if !CPU_ARM_AT91SAM7S256 && !CPU_ARM_AT91SAM7X256
-                       #warning Check Debug Unit AT91 pins on datasheet!
-               #endif
                /* Disable PIO on DGBU tx pin. */
-               PIOA_PDR = BV(10);
-               PIOA_ASR = BV(10);
+               PIOA_PDR = BV(DTXD);
+               PIOA_ASR = BV(DTXD);
                
                #if 0 /* Disable Rx for now */
                /* Enable DBGU receiver. */
                DBGU_CR = BV(US_RXEN);
-               #if !CPU_ARM_AT91SAM7S256
-                       #warning Check Debug Unit AT91 pins on datasheet!
-               #endif
                /* Disable PIO on DGBU rx pin. */
-               PIOA_PDR = BV(9);
-               PIOA_ASR = BV(9);
-
+               PIOA_PDR = BV(DRXD);
+               PIOA_ASR = BV(DRXD);
                #endif
        #else
                #error CONFIG_KDEBUG_PORT should be KDEBUG_PORT_DBGU

diff --git a/cpu/arm/io/at91sam7.h b/cpu/arm/io/at91sam7.h
index f91690e82fa05b3c7c1673353dfe981b89f36024..1e80d147ae0c5ea43ec644749872e5e1d24e9d65 100644 (file)
--- a/cpu/arm/io/at91sam7.h
+++ b/cpu/arm/io/at91sam7.h
@@ -185,7 +185,7 @@
 /*\}*/
 
 /**
- * USART pins name
+ * USART & DEBUG pin names
  *\{
  */
 #if CPU_ARM_AT91SAM7S256
@@ -193,16 +193,17 @@
        #define TXD0        6
        #define RXD1       21
        #define TXD1       22
-
+       #define DTXD       10
+       #define DRXD        9
 #elif CPU_ARM_AT91SAM7X256
-       #define RXD0       0 // PA0
-       #define TXD0       1 // PA1
-       #define RXD1       5 // PA5
-       #define TXD1       6 // PA6
-
+       #define RXD0        0 // PA0
+       #define TXD0        1 // PA1
+       #define RXD1        5 // PA5
+       #define TXD1        6 // PA6
+       #define DTXD       28 // PA28
+       #define DRXD       27 // PA27
 #else
-       #error No USART pins name definition for selected ARM CPU
-
+       #error No USART & debug pin names definition for selected ARM CPU
 #endif
 /*\}*/