arm scripts: Add new openocd gdb and flash scripts

git-svn-id: https://src.develer.com/svnoss/bertos/trunk@2762 38d2e660-2303-0410-9eaa-f027e97ec537

diff --git a/bertos/cpu/arm/scripts/at91sam7_write_to_flash.script b/bertos/cpu/arm/scripts/at91sam7_write_to_flash.script
new file mode 100644 (file)
index 0000000..9cbcb26
--- /dev/null
+++ b/bertos/cpu/arm/scripts/at91sam7_write_to_flash.script
@@ -0,0 +1,53 @@
+#\r
+# The following command wills be executed on\r
+# reset (because of run_and_init in the config-file)\r
+# - halt target\r
+# - init ecr\r
+# - flash content of file main.bin into target-memory\r
+# - shutdown openocd\r
+#\r
+# created by Martin Thomas\r
+# http://www.siwawi.arubi.uni-kl.de/avr_projects/arm_projects\r
+# based on information from Dominic Rath\r
+# modified for latest oocd - 4/29/09  -jkl\r
+#\r
+\r
+halt\r
+sleep 10\r
+\r
+# moved from below\r
+# AT91SAM7 flash command-"batch"\r
+# adapted by Martin Thomas based on information from Dominic Rath - Thanks\r
+arm7_9 dcc_downloads enable\r
+\r
+# added from internet script\r
+armv4_5 core_state arm\r
+arm7_9 fast_memory_access enable\r
+# end added from script\r
+# end moved section\r
+\r
+# Init - taken from the script openocd_at91sam7_ecr.script\r
+mww 0xfffffd44 0x00008000  # disable watchdog\r
+mww 0xfffffd08 0xa5000001  # enable user reset\r
+mww 0xfffffc20 0x00000601  # CKGR_MOR : enable the main oscillator\r
+sleep 10\r
+mww 0xfffffc2c 0x00481c0e   # CKGR_PLLR: 96.1097 MHz\r
+sleep 10\r
+mww 0xfffffc30 0x00000007  # PMC_MCKR : MCK = PLL / 2 ~= 48 MHz\r
+sleep 10\r
+mww 0xffffff60 0x003c0100  # MC_FMR: flash mode (FWS=1,FMCN=60)\r
+# arm7_9 force_hw_bkpts enable  # program resides in flash\r
+sleep 10\r
+\r
+# section was here\r
+\r
+poll\r
+flash probe 0\r
+# added from script on internet\r
+#flash protect 0 0 31 off\r
+#flash erase_sector 0 0 31\r
+#flash erase_sector 0 0 31\r
+# end add from script\r
+#flash write_bank 0 blink1ROM_rom.bin 0x0\r
+flash write_image ../../../../images/at91sam7s.bin 0x0100000 bin\r
+\r

diff --git a/bertos/cpu/arm/scripts/openocd-0.2.0_at91sam7_gdb.cfg b/bertos/cpu/arm/scripts/openocd-0.2.0_at91sam7_gdb.cfg
new file mode 100644 (file)
index 0000000..0412596
--- /dev/null
+++ b/bertos/cpu/arm/scripts/openocd-0.2.0_at91sam7_gdb.cfg
@@ -0,0 +1,71 @@
+# Change the default telnet port...
+telnet_port 4444
+
+# Port for TCL connection.
+tcl_port 6666
+
+# GDB connects here
+gdb_port 3333
+gdb_memory_map enable
+
+interface ft2232
+ft2232_device_desc "Amontec JTAGkey"
+ft2232_layout jtagkey
+ft2232_vid_pid 0x0403 0xcff8
+
+
+#use combined on interfaces or targets that can't set TRST/SRST separately
+reset_config srst_only srst_pulls_trst
+
+if { [info exists CHIPNAME] } {        
+   set  _CHIPNAME $CHIPNAME    
+} else {        
+   set  _CHIPNAME sam7
+}
+
+if { [info exists ENDIAN] } {  
+   set  _ENDIAN $ENDIAN    
+} else {        
+   set  _ENDIAN little
+}
+
+if { [info exists CPUTAPID ] } {
+   set _CPUTAPID $CPUTAPID
+} else {
+   set _CPUTAPID 0x3f0f0f0f
+}
+
+jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
+
+set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
+target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm7tdmi
+
+$_TARGETNAME configure -event reset-start {
+        # disable watchdog
+        mww 0xfffffd44 0x00008000       
+        # enable user reset
+        mww 0xfffffd08 0xa5000001       
+        # CKGR_MOR : enable the main oscillator
+        mww 0xfffffc20 0x00000601       
+        sleep 10
+        # CKGR_PLLR: 96.1097 MHz
+        mww 0xfffffc2c 0x00481c0e       
+        sleep 10
+        # PMC_MCKR : MCK = PLL / 2 ~= 48 MHz
+        mww 0xfffffc30 0x00000007       
+        sleep 10
+        # MC_FMR: flash mode (FWS=1,FMCN=60)
+        mww 0xffffff60 0x003c0100       
+        sleep 10
+       # reset PC
+       reg pc 00000000
+}
+
+$_TARGETNAME configure -event gdb-detach {
+       shutdown
+}
+
+$_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x00200000 -work-area-size 0x4000 -work-area-backup 0
+
+#flash bank <driver> <base> <size> <chip_width> <bus_width>
+flash bank at91sam7 0 0 0 0 0

diff --git a/bertos/cpu/arm/scripts/openocd-0.2.0_at91sam7_rom_flash.cfg b/bertos/cpu/arm/scripts/openocd-0.2.0_at91sam7_rom_flash.cfg
new file mode 100644 (file)
index 0000000..6f939b1
--- /dev/null
+++ b/bertos/cpu/arm/scripts/openocd-0.2.0_at91sam7_rom_flash.cfg
@@ -0,0 +1,52 @@
+# Change the default telnet port...
+telnet_port 4444
+
+# Port for TCL connection.
+tcl_port 6666
+
+# GDB connects here
+gdb_port 3333
+
+interface ft2232
+ft2232_device_desc "Amontec JTAGkey"
+ft2232_layout jtagkey
+ft2232_vid_pid 0x0403 0xcff8
+
+
+#use combined on interfaces or targets that can't set TRST/SRST separately
+reset_config srst_only srst_pulls_trst
+
+if { [info exists CHIPNAME] } {        
+   set  _CHIPNAME $CHIPNAME    
+} else {        
+   set  _CHIPNAME sam7
+}
+
+if { [info exists ENDIAN] } {  
+   set  _ENDIAN $ENDIAN    
+} else {        
+   set  _ENDIAN little
+}
+
+if { [info exists CPUTAPID ] } {
+   set _CPUTAPID $CPUTAPID
+} else {
+   set _CPUTAPID 0x3f0f0f0f
+}
+
+jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
+
+set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
+target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm7tdmi
+
+$_TARGETNAME configure -event reset-start "script at91sam7_write_to_flash.script"
+
+$_TARGETNAME configure -event reset-end "shutdown"
+
+$_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x00200000 -work-area-size 0x4000 -work-area-backup 0
+
+#flash bank <driver> <base> <size> <chip_width> <bus_width>
+flash bank at91sam7 0 0 0 0 0
+
+init
+reset run