Fix ARM endianness detection for gcc.
authorbatt <batt@38d2e660-2303-0410-9eaa-f027e97ec537>
Mon, 18 Feb 2008 18:27:45 +0000 (18:27 +0000)
committerbatt <batt@38d2e660-2303-0410-9eaa-f027e97ec537>
Mon, 18 Feb 2008 18:27:45 +0000 (18:27 +0000)
git-svn-id: https://src.develer.com/svnoss/bertos/trunk@1139 38d2e660-2303-0410-9eaa-f027e97ec537

cpu/attr.h

index a95dffdc198fe47364c531164beca27ff9ea7d19..5d0ce885d10436e861e41b9ceb81d01cf418dddf 100644 (file)
        #define CPU_SAVED_REGS_CNT     9
        #define CPU_STACK_GROWS_UPWARD 0
        #define CPU_SP_ON_EMPTY_SLOT   0
-       #warning Find a way to detect endianess at compile time
-       #define CPU_BYTE_ORDER         CPU_LITTLE_ENDIAN
        #define CPU_HARVARD            0
 
        #ifdef __IAR_SYSTEMS_ICC__
-               #define NOP         __no_operation()
+               #warning Check CPU_BYTE_ORDER
+               #define CPU_BYTE_ORDER (__BIG_ENDIAN__ ? CPU_BIG_ENDIAN : CPU_LITTLE_ENDIAN)
+
+               #define NOP            __no_operation()
        #else /* !__IAR_SYSTEMS_ICC__ */
-               #define NOP         asm volatile ("mov r0,r0" ::)
+               #if defined(__ARMEB__)
+                       #define CPU_BYTE_ORDER CPU_BIG_ENDIAN
+               #elif defined(__ARMEL__)
+                       #define CPU_BYTE_ORDER CPU_LITTLE_ENDIAN
+               #else
+                       #error Unable to detect ARM endianness!
+               #endif
+
+               #define NOP            asm volatile ("mov r0,r0" ::)
 
                /**
                 * Initialization value for registers in stack frame.
 
        /*
         * If the kernel is in idle-spinning, the processor execute:
-        * 
+        *
         * IRQ_ENABLE;
         * CPU_IDLE;
         * IRQ_DISABLE;