--- /dev/null
+/**
+ * \file
+ * <!--
+ * This file is part of BeRTOS.
+ *
+ * Bertos is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ *
+ * As a special exception, you may use this file as part of a free software
+ * library without restriction. Specifically, if other files instantiate
+ * templates or use macros or inline functions from this file, or you compile
+ * this file and link it with other files to produce an executable, this
+ * file does not by itself cause the resulting executable to be covered by
+ * the GNU General Public License. This exception does not however
+ * invalidate any other reasons why the executable file might be covered by
+ * the GNU General Public License.
+ *
+ * Copyright 2008 Develer S.r.l. (http://www.develer.com/)
+ *
+ * -->
+ *
+ * \brief Configuration file for KFile interface module.
+ *
+ * \version $Id$
+ * \author Daniele Basile <asterix@develer.com>
+ */
+
+#ifndef CFG_KFILE_H
+#define CFG_KFILE_H
+
+/**
+ * Module logging level.
+ * $WIZ$ type = "enum"
+ * $WIZ$ value_list = "log_level"
+ */
+#define KFILE_LOG_LEVEL LOG_LVL_INFO
+
+/**
+ * Module logging format.
+ * $WIZ$ type = "enum"
+ * $WIZ$ value_list = "log_format"
+ */
+#define KFILE_LOG_FORMAT LOG_FMT_TERSE
+
+/**
+ * Enable the gets function with echo.
+ * $WIZ$ type = "boolean"
+ */
+#define CONFIG_KFILE_GETS 1
+
+#endif /* CFG_KFILE_H */
--- /dev/null
+/**
+ * \file
+ * <!--
+ * This file is part of BeRTOS.
+ *
+ * Bertos is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ *
+ * As a special exception, you may use this file as part of a free software
+ * library without restriction. Specifically, if other files instantiate
+ * templates or use macros or inline functions from this file, or you compile
+ * this file and link it with other files to produce an executable, this
+ * file does not by itself cause the resulting executable to be covered by
+ * the GNU General Public License. This exception does not however
+ * invalidate any other reasons why the executable file might be covered by
+ * the GNU General Public License.
+ *
+ * Copyright 2008 Develer S.r.l. (http://www.develer.com/)
+ * All Rights Reserved.
+ * -->
+ *
+ * \brief Configuration file for serial module.
+ *
+ * \version $Id$
+ *
+ * \author Daniele Basile <asterix@develer.com>
+ */
+
+#ifndef CFG_SER_H
+#define CFG_SER_H
+
+/**
+ * Example of setting for serial port and
+ * spi port.
+ * Edit these define for your project.
+ */
+
+/**
+ * Size of the outbound FIFO buffer for port 0 [bytes].
+ * $WIZ$ type = "int"
+ * $WIZ$ min = 2
+ */
+#define CONFIG_UART0_TXBUFSIZE 32
+
+/**
+ * Size of the inbound FIFO buffer for port 0 [bytes].
+ * $WIZ$ type = "int"
+ * $WIZ$ min = 2
+ */
+#define CONFIG_UART0_RXBUFSIZE 32
+
+/**
+ * Size of the outbound FIFO buffer for port 1 [bytes].
+ * $WIZ$ type = "int"
+ * $WIZ$ min = 2
+ * $WIZ$ supports = "at91 and not atmega8 and not atmega168 and not atmega32"
+ */
+#define CONFIG_UART1_TXBUFSIZE 32
+
+/**
+ * Size of the inbound FIFO buffer for port 1 [bytes].
+ * $WIZ$ type = "int"
+ * $WIZ$ min = 2
+ * $WIZ$ supports = "at91 and not atmega8 and not atmega168 and not atmega32"
+ */
+#define CONFIG_UART1_RXBUFSIZE 32
+
+/**
+ * Size of the outbound FIFO buffer for port 2 [bytes].
+ * $WIZ$ type = "int"
+ * $WIZ$ min = 2
+ * $WIZ$ supports = "lm3s"
+ */
+#define CONFIG_UART2_TXBUFSIZE 32
+
+/**
+ * Size of the inbound FIFO buffer for port 2 [bytes].
+ * $WIZ$ type = "int"
+ * $WIZ$ min = 2
+ * $WIZ$ supports = "lm3s"
+ */
+#define CONFIG_UART2_RXBUFSIZE 32
+
+
+/**
+ * Size of the outbound FIFO buffer for SPI port [bytes].
+ * $WIZ$ type = "int"
+ * $WIZ$ min = 2
+ * $WIZ$ supports = "avr"
+ */
+#define CONFIG_SPI_TXBUFSIZE 32
+
+/**
+ * Size of the inbound FIFO buffer for SPI port [bytes].
+ * $WIZ$ type = "int"
+ * $WIZ$ min = 2
+ * $WIZ$ supports = "avr"
+ */
+#define CONFIG_SPI_RXBUFSIZE 32
+
+/**
+ * Size of the outbound FIFO buffer for SPI port 0 [bytes].
+ * $WIZ$ type = "int"
+ * $WIZ$ min = 2
+ * $WIZ$ supports = "at91"
+ */
+#define CONFIG_SPI0_TXBUFSIZE 32
+
+/**
+ * Size of the inbound FIFO buffer for SPI port 0 [bytes].
+ * $WIZ$ type = "int"
+ * $WIZ$ min = 2
+ * $WIZ$ supports = "at91"
+ */
+#define CONFIG_SPI0_RXBUFSIZE 32
+
+/**
+ * Size of the outbound FIFO buffer for SPI port 1 [bytes].
+ * $WIZ$ type = "int"
+ * $WIZ$ min = 2
+ * $WIZ$ supports = "at91"
+ */
+#define CONFIG_SPI1_TXBUFSIZE 32
+
+/**
+ * Size of the inbound FIFO buffer for SPI port 1 [bytes].
+ * $WIZ$ type = "int"
+ * $WIZ$ min = 2
+ * $WIZ$ supports = "at91"
+ */
+#define CONFIG_SPI1_RXBUFSIZE 32
+
+/**
+ * SPI data order.
+ *
+ * $WIZ$ type = "enum"
+ * $WIZ$ value_list = "ser_order_bit"
+ * $WIZ$ supports = "avr"
+ */
+#define CONFIG_SPI_DATA_ORDER SER_MSB_FIRST
+
+/**
+ * SPI clock division factor.
+ * $WIZ$ type = "int"
+ * $WIZ$ supports = "avr"
+ */
+#define CONFIG_SPI_CLOCK_DIV 16
+
+/**
+ * SPI clock polarity: normal low or normal high.
+ * $WIZ$ type = "enum"
+ * $WIZ$ value_list = "ser_spi_pol"
+ * $WIZ$ supports = "avr"
+ */
+#define CONFIG_SPI_CLOCK_POL SPI_NORMAL_LOW
+
+/**
+ * SPI clock phase you can choose sample on first edge or
+ * sample on second clock edge.
+ * $WIZ$ type = "enum"
+ * $WIZ$ value_list = "ser_spi_phase"
+ * $WIZ$ supports = "avr"
+ */
+#define CONFIG_SPI_CLOCK_PHASE SPI_SAMPLE_ON_FIRST_EDGE
+
+/**
+ * Default transmit timeout (ms). Set to -1 to disable timeout support.
+ * $WIZ$ type = "int"
+ * $WIZ$ min = -1
+ */
+#define CONFIG_SER_TXTIMEOUT -1
+
+/**
+ * Default receive timeout (ms). Set to -1 to disable timeout support.
+ * $WIZ$ type = "int"
+ * $WIZ$ min = -1
+ */
+#define CONFIG_SER_RXTIMEOUT -1
+
+/**
+ * Use RTS/CTS handshake.
+ * $WIZ$ type = "boolean"
+ * $WIZ$ supports = "False"
+ */
+#define CONFIG_SER_HWHANDSHAKE 0
+
+/**
+ * Default baudrate for all serial ports (set to 0 to disable).
+ * $WIZ$ type = "int"
+ * $WIZ$ min = 0
+ */
+#define CONFIG_SER_DEFBAUDRATE 0UL
+
+/// Enable strobe pin for debugging serial interrupt. $WIZ$ type = "boolean"
+#define CONFIG_SER_STROBE 0
+
+#endif /* CFG_SER_H */
#include <cpu/irq.h>
#include <drv/timer.h>
+#include <drv/ser.h>
#include <gfx/gfx.h>
#include <gfx/font.h>
#include <gfx/text.h>
#include "hw/hw_lcd.h"
-#define PROC_STACK_SIZE KERN_MINSTACKSIZE * 2
+#define PROC_STACK_SIZE KERN_MINSTACKSIZE
#if CONFIG_KERN_HEAP
#define hp_stack NULL
#define lp_stack NULL
+#define ser_stack NULL
+#define led_stack NULL
#else
static PROC_DEFINE_STACK(hp_stack, PROC_STACK_SIZE);
static PROC_DEFINE_STACK(lp_stack, PROC_STACK_SIZE);
+static PROC_DEFINE_STACK(ser_stack, PROC_STACK_SIZE);
+static PROC_DEFINE_STACK(led_stack, PROC_STACK_SIZE);
#endif
static Process *hp_proc, *lp_proc, *res_proc;
static hptime_t start, end;
-static uint8_t raster[RAST_SIZE(128, 96)];
+static uint8_t raster[RAST_SIZE(LCD_WIDTH, LCD_HEIGHT)];
static Bitmap bm;
extern Font font_helvB10;
GPIO_PORTG_DATA_R &= ~0x04;
}
+static void NORETURN led_process(void)
+{
+ int i;
+
+ for (i = 0; ; i++)
+ {
+ if (i & 1)
+ led_on();
+ else
+ led_off();
+ timer_delay(50);
+ }
+}
+
INLINE hptime_t get_hp_ticks(void)
{
return (TIMER_HW_CNT - timer_hw_hpread()) +
static void NORETURN res_process(void)
{
const char spinner[] = {'/', '-', '\\', '|'};
- char buffer[256], c;
+ char buffer[32], c;
int i;
for (i = 0; ; i++)
{
ticks_t clock;
- sig_wait(SIG_USER0);
clock = timer_clock_unlocked();
/* Display uptime (in ticks) */
((end - start) * (100000000 / CPU_FREQ)) % 100);
text_xprintf(&bm, 7, 0, TEXT_FILL, buffer);
rit128x96_lcd_blitBitmap(&bm);
-
- /* Blink the status LED and restart the test */
- led_off();
- timer_delay(100);
- led_on();
- sig_send(lp_proc, SIG_USER0);
}
}
{
sig_wait(SIG_USER0);
end = get_hp_ticks();
- sig_send(res_proc, SIG_USER0);
+ timer_delay(100);
+ sig_send(lp_proc, SIG_USER0);
}
}
}
}
+static void NORETURN ser_process(void)
+{
+ char buf[32];
+ Serial ser_port;
+ int i;
+
+ ser_init(&ser_port, SER_UART0);
+ ser_setbaudrate(&ser_port, 115200);
+
+ /* BeRTOS terminal */
+ for (i = 0; ; i++)
+ {
+ kfile_printf(&ser_port.fd, "\n\r[%03d] BeRTOS:~$ ", i);
+ kfile_gets_echo(&ser_port.fd, buf, sizeof(buf), true);
+ kfile_printf(&ser_port.fd, "%s", buf);
+ }
+}
+
int main(void)
{
char buffer[32];
rit128x96_lcd_init();
gfx_bitmapInit(&bm, raster, LCD_WIDTH, LCD_HEIGHT);
gfx_setFont(&bm, &font_helvB10);
+ rit128x96_lcd_blitBitmap(&bm);
kputs("Done.\n");
bouncing_logo(&bm);
hp_proc = proc_new(hp_process, NULL, PROC_STACK_SIZE, hp_stack);
lp_proc = proc_new(lp_process, NULL, PROC_STACK_SIZE, lp_stack);
+ proc_new(led_process, NULL, PROC_STACK_SIZE, led_stack);
+ proc_new(ser_process, NULL, PROC_STACK_SIZE, ser_stack);
res_proc = proc_current();
bertos/mware/event.c \
bertos/struct/heap.c \
bertos/drv/timer.c \
+ bertos/drv/ser.c \
bertos/drv/lcd_rit128x96.c \
+ bertos/kern/kfile.c \
bertos/kern/monitor.c \
bertos/kern/proc_test.c \
bertos/kern/proc.c \
bertos/cpu/cortex-m3/drv/gpio_lm3s.c \
bertos/cpu/cortex-m3/drv/timer_lm3s.c \
bertos/cpu/cortex-m3/drv/clock_lm3s.c \
+ bertos/cpu/cortex-m3/drv/ser_lm3s.c \
bertos/cpu/cortex-m3/drv/kdebug_lm3s.c \
bertos/cpu/cortex-m3/drv/ssi_lm3s.c \
bertos/cpu/cortex-m3/drv/irq_cm3.c \