Add adc implementation for sam3x.

git-svn-id: https://src.develer.com/svnoss/bertos/trunk@4785 38d2e660-2303-0410-9eaa-f027e97ec537

diff --git a/bertos/cpu/cortex-m3/drv/adc_sam3.c b/bertos/cpu/cortex-m3/drv/adc_sam3.c
new file mode 100644 (file)
index 0000000..7dd48bf
--- /dev/null
+++ b/bertos/cpu/cortex-m3/drv/adc_sam3.c
@@ -0,0 +1,149 @@
+/**
+ * \file
+ * <!--
+ * This file is part of BeRTOS.
+ *
+ * Bertos is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ *
+ * As a special exception, you may use this file as part of a free software
+ * library without restriction.  Specifically, if other files instantiate
+ * templates or use macros or inline functions from this file, or you compile
+ * this file and link it with other files to produce an executable, this
+ * file does not by itself cause the resulting executable to be covered by
+ * the GNU General Public License.  This exception does not however
+ * invalidate any other reasons why the executable file might be covered by
+ * the GNU General Public License.
+ *
+ * Copyright 2011 Develer S.r.l. (http://www.develer.com/)
+ *
+ * -->
+ *
+ * \brief ADC hardware-specific implementation
+ *
+ * \author Daniele Basile <asterix@develer.com>
+ */
+
+
+#include "adc_sam3.h"
+
+#include "cfg/cfg_adc.h"
+
+#include <cfg/macros.h>
+#include <cfg/compiler.h>
+
+// Define log settings for cfg/log.h.
+#define LOG_LEVEL         ADC_LOG_LEVEL
+#define LOG_FORMAT        ADC_LOG_FORMAT
+#include <cfg/log.h>
+
+#include <drv/adc.h>
+#include <drv/irq_cm3.h>
+
+#include <cpu/irq.h>
+
+#include <mware/event.h>
+
+#include <io/cm3.h>
+
+
+static Event data_ready;
+static uint32_t data;
+
+/**
+ * ADC ISR.
+ */
+static DECLARE_ISR(adc_conversion_end_irq)
+{
+       data = 0;
+       if (ADC_ISR & BV(ADC_DRDY))
+       {
+               data = ADC_LDATA;
+               event_do(&data_ready);
+       }
+}
+
+/**
+ * Select mux channel \a ch.
+ */
+void adc_hw_select_ch(uint8_t ch)
+{
+       /* Disable all channels */
+       ADC_CHDR = ADC_CH_MASK;
+       /* Enable select channel */
+       ADC_CHER = BV(ch);
+}
+
+
+/**
+ * Start an ADC convertion.
+ */
+uint16_t adc_hw_read(void)
+{
+       ADC_CR = BV(ADC_START);
+       event_wait(&data_ready);
+       return(data);
+}
+
+/**
+ * Init ADC hardware.
+ */
+void adc_hw_init(void)
+{
+       /* Make sure that interrupt are enabled */
+       IRQ_ASSERT_ENABLED();
+
+       /* Initialize the dataready event */
+       event_initGeneric(&data_ready);
+
+       /* Clock ADC peripheral */
+       pmc_periphEnable(ADC_ID);
+
+
+        /* Reset adc controller */
+       ADC_CR = ADC_SWRST;
+
+       /*
+        * Set adc mode register:
+        * - Disable hardware trigger and enable software trigger.
+        * - Select normal mode.
+        */
+       ADC_MR = 0;
+
+       /* Set ADC_BITS bit convertion resolution. */
+       #if ADC_BITS == 12
+               ADC_MR &= ~BV(ADC_LOWRES);
+       #elif ADC_BITS == 10
+               ADC_MR |= BV(ADC_LOWRES);
+       #else
+               #error No select bit resolution is supported to this CPU
+       #endif
+
+       /* Setup ADC */
+       LOG_INFO("Computed ADC_CLOCK %ld\n", ADC_CLOCK);
+       ADC_MR |= ((ADC_PRESCALER << ADC_PRESCALER_SHIFT) & ADC_PRESCALER_MASK);
+       LOG_INFO("prescaler[%ld]\n", ADC_PRESCALER);
+       ADC_MR |= ((ADC_SUT512 << ADC_STARTUP_SHIFT) & ADC_STARTUP_MASK);
+       LOG_INFO("starup[%d]\n", ADC_SUT512);
+       ADC_MR |= ((ADC_AST17 << ADC_SETTLING_SHIFT) & ADC_SETTLING_MASK);
+       LOG_INFO("sttime[%d]\n", ADC_AST17);
+       ADC_MR |= ((0 << ADC_TRACKTIM_SHIFT) & ADC_TRACKTIM_MASK);
+       LOG_INFO("tracking[%d]\n", 0);
+       ADC_MR |= ((1 << ADC_TRANSFER_SHIFT) & ADC_TRANSFER_MASK);
+       LOG_INFO("tranfer[%d]\n", 1);
+
+       /* Register and enable irq for adc. */
+       sysirq_setHandler(INT_ADC, adc_conversion_end_irq);
+       ADC_IER = BV(ADC_DRDY);
+}

diff --git a/bertos/cpu/cortex-m3/drv/adc_sam3.h b/bertos/cpu/cortex-m3/drv/adc_sam3.h
new file mode 100644 (file)
index 0000000..1a6ca53
--- /dev/null
+++ b/bertos/cpu/cortex-m3/drv/adc_sam3.h
@@ -0,0 +1,65 @@
+/**
+ * \file
+ * <!--
+ * This file is part of BeRTOS.
+ *
+ * Bertos is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ *
+ * As a special exception, you may use this file as part of a free software
+ * library without restriction.  Specifically, if other files instantiate
+ * templates or use macros or inline functions from this file, or you compile
+ * this file and link it with other files to produce an executable, this
+ * file does not by itself cause the resulting executable to be covered by
+ * the GNU General Public License.  This exception does not however
+ * invalidate any other reasons why the executable file might be covered by
+ * the GNU General Public License.
+ *
+ * Copyright 2008 Develer S.r.l. (http://www.develer.com/)
+ *
+ * -->
+ *
+ * \brief ADC hardware-specific definition
+ *
+ * \author Daniele Basile <asterix@develer.com>
+ */
+
+#ifndef DRV_ADC_AT91_H
+#define DRV_ADC_AT91_H
+
+#include <hw/hw_cpufreq.h>
+
+#include "cfg/cfg_adc.h"
+
+#include <cfg/compiler.h>
+
+/**
+ * ADC config define.
+ */
+#define ADC_MUX_MAXCH         16 //Max number of channel for ADC.
+#define ADC_BITS              12 //Bit resolution for ADC converter.
+
+/**
+ * Macro for computing correct value to write into ADC
+ * register.
+ */
+#define ADC_PRESCALER    (DIV_ROUNDUP(CPU_FREQ, 2 * CONFIG_ADC_CLOCK) - 1)
+#define ADC_CLOCK        (CPU_FREQ / ((ADC_PRESCALER + 1) * 2))
+#define ADC_STARTUPTIME  (((CONFIG_ADC_STARTUP_TIME * ADC_COMPUTED_CLOCK) / 8000000UL) - 1)
+
+void adc_hw_select_ch(uint8_t ch);
+uint16_t adc_hw_read(void);
+void adc_hw_init(void);
+
+#endif /* DRV_ADC_AT91_H */