\
#
-at91sam7x-ek_sd_fat_CPPFLAGS = -D'CPU_FREQ=(48054857UL)' -D'ARCH=(ARCH_DEFAULT)' -D'WIZ_AUTOGEN' -I$(at91sam7x-ek_sd_fat_HW_PATH) -I$(at91sam7x-ek_sd_fat_SRC_PATH) $(at91sam7x-ek_sd_fat_CPU_CPPFLAGS) $(at91sam7x-ek_sd_fat_USER_CPPFLAGS)
+at91sam7x-ek_sd_fat_CPPFLAGS = -D'CPU_FREQ=(48023000UL)' -D'ARCH=(ARCH_DEFAULT)' -D'WIZ_AUTOGEN' -I$(at91sam7x-ek_sd_fat_HW_PATH) -I$(at91sam7x-ek_sd_fat_SRC_PATH) $(at91sam7x-ek_sd_fat_CPU_CPPFLAGS) $(at91sam7x-ek_sd_fat_USER_CPPFLAGS)
# Automatically generated by the wizard. PLEASE DO NOT EDIT!
at91sam7x-ek_sd_fat_LDFLAGS = $(at91sam7x-ek_sd_fat_CPU_LDFLAGS) $(at91sam7x-ek_sd_fat_WIZARD_LDFLAGS) $(at91sam7x-ek_sd_fat_USER_LDFLAGS)
*
* $WIZ$ type = "enum"
* $WIZ$ value_list = "ser_order_bit"
- * $WIZ$ supports = "avr"
+ * $WIZ$ supports = "avr and not xmega32d"
*/
#define CONFIG_SPI_DATA_ORDER SER_MSB_FIRST
/**
* SPI clock division factor.
* $WIZ$ type = "int"
- * $WIZ$ supports = "avr"
+ * $WIZ$ supports = "avr and not xmega32d"
*/
#define CONFIG_SPI_CLOCK_DIV 16
* SPI clock polarity: normal low or normal high.
* $WIZ$ type = "enum"
* $WIZ$ value_list = "ser_spi_pol"
- * $WIZ$ supports = "avr"
+ * $WIZ$ supports = "avr and not xmega32d"
*/
#define CONFIG_SPI_CLOCK_POL SPI_NORMAL_LOW
* sample on second clock edge.
* $WIZ$ type = "enum"
* $WIZ$ value_list = "ser_spi_phase"
- * $WIZ$ supports = "avr"
+ * $WIZ$ supports = "avr and not xmega32d"
*/
#define CONFIG_SPI_CLOCK_PHASE SPI_SAMPLE_ON_FIRST_EDGE
p10
Varm-none-eabi-gcc
p11
-ssS'PROJECT_SRC_PATH_FROM_MAKEFILE'
+ssS'PROJECT_HW_PATH_FROM_MAKEFILE'
p12
-Vboards/at91sam7x-ek/examples/at91sam7x-ek_sd_fat
+Vboards/at91sam7x-ek
p13
sS'ENABLED_MODULES'
p14
sS'PRESET'
p34
I01
-sS'PROJECT_HW_PATH_FROM_MAKEFILE'
+sS'PROJECT_SRC_PATH_FROM_MAKEFILE'
p35
-Vboards/at91sam7x-ek
+Vboards/at91sam7x-ek/examples/at91sam7x-ek_sd_fat
p36
sS'OUTPUT'
p37