Correctly detect Cortex-M3 cpus.

git-svn-id: https://src.develer.com/svnoss/bertos/trunk@3331 38d2e660-2303-0410-9eaa-f027e97ec537

diff --git a/bertos/cpu/arm/io/arm.h b/bertos/cpu/arm/io/arm.h
index 1e268617a3432e0b6a7a1809d0f4dc8a29259694..5690c317219344cce45103d2ba616a37278c98ae 100644 (file)
--- a/bertos/cpu/arm/io/arm.h
+++ b/bertos/cpu/arm/io/arm.h
@@ -46,9 +46,6 @@
 #if CPU_ARM_AT91
        #include "at91.h"
 /*#elif  Add other ARM families here */
-#elif CPU_ARM_LM3S
-       #include "lm3s.h"
-
 #else
        #error Unknown CPU
 #endif

diff --git a/bertos/cpu/attr.h b/bertos/cpu/attr.h
index dae231ffa673a158e17dcfe4beb2beee1dc452e9..5e24fa3c9d3ee7b57ae6d19ad36212f2798789a5 100644 (file)
--- a/bertos/cpu/attr.h
+++ b/bertos/cpu/attr.h
@@ -109,8 +109,6 @@
        /// Valid pointers should be >= than this value (used for debug)
        #if CPU_ARM_AT91
                #define CPU_RAM_START           0x00200000
-       #elif CPU_ARM_LM3S1968
-               #define CPU_RAM_START           0x20000000
        #else
                #warning Fix CPU_RAM_START address for your ARM, default value set to 0x200
                #define CPU_RAM_START           0x200
@@ -164,6 +162,30 @@
                #define RAM_FUNC __attribute__((section(".data")))
 
        #endif /* !__IAR_SYSTEMS_ICC_ */
+#elif CPU_CM3
+
+       #define CPU_REG_BITS           32
+       #define CPU_REGS_CNT           fixme
+       #define CPU_HARVARD            0
+
+       /// Valid pointers should be >= than this value (used for debug)
+       #if CPU_CM3_LM3S1968
+               #define CPU_RAM_START 0x20000000
+       #else
+               #warning Fix CPU_RAM_START address for your Cortex-M3, default value set to 0x200
+               #define CPU_RAM_START 0x200
+       #endif
+
+       #if defined(__ARMEB__)
+               #define CPU_BYTE_ORDER CPU_BIG_ENDIAN
+       #elif defined(__ARMEL__)
+               #define CPU_BYTE_ORDER CPU_LITTLE_ENDIAN
+       #else
+               #error Unable to detect Cortex-M3 endianness!
+       #endif
+
+       #define NOP         fixme
+       #define BREAKPOINT  /* asm("bkpt 0") DOES NOT WORK */
 
 #elif CPU_PPC
 

diff --git a/bertos/cpu/cortex-m3/io/lm3s.h b/bertos/cpu/cortex-m3/io/lm3s.h
index a7cf5a0ef8eaafb218a546ea447e1915d1957b01..c920d35eaf1436d64a8dfed263e78e7d71930f37 100644 (file)
--- a/bertos/cpu/cortex-m3/io/lm3s.h
+++ b/bertos/cpu/cortex-m3/io/lm3s.h
@@ -40,7 +40,7 @@
 #include <cfg/compiler.h>
 
 
-#if CPU_ARM_LM3S1968
+#if CPU_CM3_LM3S1968
        #include "lm3s1968.h"
        #include "lm3s_types.h"
        #include "lm3s_ints.h"

diff --git a/bertos/cpu/detect.h b/bertos/cpu/detect.h
index 3c4712d25f1fd72f8fbcfcd7657f75274a05d0b3..d421f85e7c156364c9cce86ed3799f40d33d8255 100644 (file)
--- a/bertos/cpu/detect.h
+++ b/bertos/cpu/detect.h
@@ -36,16 +36,10 @@
 #ifndef CPU_DETECT_H
 #define CPU_DETECT_H
 
-#if defined(__arm__) /* GCC */ \
+#if defined(__ARM_ARCH_4T__) /* GCC */ \
        || defined(__ARM4TM__) /* IAR: defined for all cores >= 4tm */
-       #define CPU_ARM                 1
-
-       // Cortex-M3 core family
-       #if defined(__ARM_LM3S1968__)
-               #define CPU_ID                  lm3s
-       #else
-               #define CPU_ID                  arm
-       #endif
+       #define CPU_ARM 1
+       #define CPU_ID  arm
 
        // AT91SAM7S core family
        #if defined(__ARM_AT91SAM7S32__)
@@ -113,19 +107,12 @@
                #define CPU_ARM_AT91SAM7X512 0
        #endif
 
-       #if defined (__ARM_LM3S1968__)
-               #define CPU_ARM_LM3S        1
-               #define CPU_ARM_LM3S1968    1
-       #else
-               #define CPU_ARM_LM3S1968    0
-       #endif
-
        #if defined(__ARM_LPC2378__)
                #define CPU_ARM_LPC2        1
                #define CPU_ARM_LPC2378     1
        #else
                #define CPU_ARM_LPC2378     0
-       #endif  
+       #endif
 
        #if !defined(CPU_ARM_SAM7S_LARGE)
                #define CPU_ARM_SAM7S_LARGE 0
@@ -144,32 +131,22 @@
                + CPU_ARM_AT91SAM7X512 != 1
                        #error ARM CPU configuration error
                #endif
-               #define CPU_ARM_LM3S        0
                #define CPU_ARM_LPC2        0
 
-       #elif defined (CPU_ARM_LM3S)
-               #if CPU_ARM_LM3S1968 + 0 != 1
-                       #error Luminary ARM CPU configuration error
-               #endif
-               #define CPU_ARM_AT91        0
-               #define CPU_ARM_LPC2        0
        #elif defined (CPU_ARM_LPC2)
-               
+
                #if CPU_ARM_LPC2378 + 0 != 1
                        #error NXP LPC2xxx ARM CPU configuration error
                #endif
                #define CPU_ARM_AT91        0
-               #define CPU_ARM_LM3S        0
        /* #elif Add other ARM families here */
        #else
                #define CPU_ARM_AT91        0
-               #define CPU_ARM_LM3S        0
                #define CPU_ARM_LPC2        0
        #endif
 
 
-       #if CPU_ARM_AT91 + CPU_ARM_LM3S \
-               + CPU_ARM_LPC2 + 0 /* Add other ARM families here */ != 1
+       #if CPU_ARM_AT91 + CPU_ARM_LPC2 + 0 /* Add other ARM families here */ != 1
                #error ARM CPU configuration error
        #endif
 #else
@@ -177,7 +154,6 @@
 
        /* ARM Families */
        #define CPU_ARM_AT91            0
-       #define CPU_ARM_LM3S            0
        #define CPU_ARM_LPC2            0
 
        /* SAM7 sub-families */
@@ -194,11 +170,43 @@
        #define CPU_ARM_AT91SAM7X256    0
        #define CPU_ARM_AT91SAM7X512    0
 
-       #define CPU_ARM_LM3S1968        0
-
        #define CPU_ARM_LPC2378         0
 #endif
 
+#if defined(__ARM_ARCH_7M__)
+       /* Cortex-M3 */
+       #define CPU_CM3 1
+       #define CPU_ID  cm3
+
+       #if defined (__ARM_LM3S1968__)
+               #define CPU_CM3_LM3S        1
+               #define CPU_CM3_LM3S1968    1
+       #else
+               #define CPU_CM3_LM3S1968    0
+       #endif
+
+       #if defined (CPU_CM3_LM3S)
+               #if CPU_CM3_LM3S1968 + 0 != 1
+                       #error Luminary Cortex-M3 CPU configuration error
+               #endif
+       /* #elif Add other Cortex-M3 families here */
+       #else
+               #define CPU_CM3_LM3S        0
+       #endif
+
+
+       #if CPU_CM3_LM3S + 0 /* Add other Cortex-M3 families here */ != 1
+               #error Cortex-M3 CPU configuration error
+       #endif
+
+#else
+       #define CPU_CM3 0
+
+       #define CPU_CM3_LM3S 0
+
+       #define CPU_CM3_LM3S1968 0
+#endif
+
 #if (defined(__IAR_SYSTEMS_ICC__) || defined(__IAR_SYSTEMS_ICC)) \
        && !defined(__ARM4TM__) /* IAR: if not ARM assume I196 */
        #warning Assuming CPU is I196
@@ -322,11 +330,11 @@
 
 
 /* Self-check for the detection: only one CPU must be detected */
-#if CPU_ARM + CPU_I196 + CPU_X86 + CPU_PPC + CPU_DSP56K + CPU_AVR == 0
+#if CPU_ARM + CPU_CM3 + CPU_I196 + CPU_X86 + CPU_PPC + CPU_DSP56K + CPU_AVR == 0
        #error Unknown CPU
 #elif !defined(CPU_ID)
        #error CPU_ID not defined
-#elif CPU_ARM + CPU_I196 + CPU_X86 + CPU_PPC + CPU_DSP56K + CPU_AVR != 1
+#elif CPU_ARM + CPU_CM3 + CPU_I196 + CPU_X86 + CPU_PPC + CPU_DSP56K + CPU_AVR != 1
        #error Internal CPU configuration error
 #endif
 

diff --git a/bertos/cpu/irq.h b/bertos/cpu/irq.h
index 3a2dab5b21beb26aebf7c0c4b3c68269a348fe90..dfe16fddc1a9c2c753da34b6bdc35821f7261606 100644 (file)
--- a/bertos/cpu/irq.h
+++ b/bertos/cpu/irq.h
@@ -63,7 +63,8 @@
                #define IRQ_RESTORE(x)          FIXME
        #endif /* OS_EMBEDDED */
 
-#elif CPU_ARM_LM3S1968
+#elif CPU_CM3
+       /* Cortex-M3 */
 
        #define IRQ_DISABLE asm volatile ("cpsid i" : : : "memory", "cc")
        #define IRQ_ENABLE asm volatile ("cpsie i" : : : "memory", "cc")