+++ /dev/null
-target remote localhost:3333
-monitor reset
-monitor sleep 500
-monitor poll
-monitor soft_reset_halt
-
-# WDT_MR, disable watchdog
-monitor mww 0xFFFFFD44 0x00008000
-
-# RSTC_MR, enable user reset
-monitor mww 0xfffffd08 0xa5000001
-
-# CKGR_MOR
-monitor mww 0xFFFFFC20 0x00000601
-monitor sleep 10
-
-# CKGR_PLLR
-monitor mww 0xFFFFFC2C 0x00481c0e
-monitor sleep 10
-
-# PMC_MCKR
-monitor mww 0xFFFFFC30 0x00000007
-monitor sleep 10
-
-# PMC_IER
-monitor mww 0xFFFFFF60 0x00480100
-monitor sleep 100
-
-#Remap RAM to address 0
-monitor mww 0xFFFFFF00 0x00000001
-monitor sleep 100
-
-break main
-load
-continue
+++ /dev/null
-target remote localhost:3333\r
-monitor reset\r
-monitor sleep 500\r
-monitor poll\r
-monitor soft_reset_halt\r
-monitor arm7_9 sw_bkpts enable\r
-#monitor arm7_9 force_hw_bkpts enable\r
-# WDT_MR, disable watchdog \r
-monitor mww 0xFFFFFD44 0x00008000\r
-\r
-# RSTC_MR, enable user reset\r
-monitor mww 0xfffffd08 0xa5000001\r
-\r
-# CKGR_MOR\r
-monitor mww 0xFFFFFC20 0x00000601\r
-monitor sleep 10\r
-\r
-# CKGR_PLLR\r
-monitor mww 0xFFFFFC2C 0x00481c0e\r
-monitor sleep 10\r
-\r
-# PMC_MCKR\r
-monitor mww 0xFFFFFC30 0x00000007\r
-monitor sleep 10\r
-\r
-# PMC_IER\r
-monitor mww 0xFFFFFF60 0x00480100\r
-monitor sleep 100\r
-\r
-#Remap RAM to address 0\r
-monitor mww 0xFFFFFF00 0x00000001\r
-monitor sleep 100\r
-\r
-break main\r
-load\r
-continue\r
+++ /dev/null
-target remote localhost:3333\r
-monitor reset\r
-monitor sleep 500\r
-monitor poll\r
-monitor soft_reset_halt\r
-#monitor arm7_9 sw_bkpts enable\r
-monitor arm7_9 force_hw_bkpts enable\r
-# WDT_MR, disable watchdog \r
-monitor mww 0xFFFFFD44 0x00008000\r
-\r
-# RSTC_MR, enable user reset\r
-monitor mww 0xfffffd08 0xa5000001\r
-\r
-# CKGR_MOR\r
-monitor mww 0xFFFFFC20 0x00000601\r
-monitor sleep 10\r
-\r
-# CKGR_PLLR\r
-monitor mww 0xFFFFFC2C 0x00481c0e\r
-monitor sleep 10\r
-\r
-# PMC_MCKR\r
-monitor mww 0xFFFFFC30 0x00000007\r
-monitor sleep 10\r
-\r
-# PMC_IER\r
-monitor mww 0xFFFFFF60 0x00480100\r
-monitor sleep 100\r
-\r
-#Remap RAM to address 0\r
-#monitor mww 0xFFFFFF00 0x00000001\r
-#monitor sleep 100\r
-\r
-break main\r
-load\r
-continue\r
+++ /dev/null
-#\r
-# The following command wills be executed on\r
-# reset (because of run_and_init in the config-file)\r
-# - halt target\r
-# - init ecr\r
-# - flash content of file main.bin into target-memory\r
-# - shutdown openocd\r
-#\r
-# created by Martin Thomas\r
-# http://www.siwawi.arubi.uni-kl.de/avr_projects/arm_projects\r
-# based on information from Dominic Rath\r
-# modified for latest oocd - 4/29/09 -jkl\r
-#\r
-\r
-halt\r
-sleep 10\r
-\r
-# moved from below\r
-# AT91SAM7 flash command-"batch"\r
-# adapted by Martin Thomas based on information from Dominic Rath - Thanks\r
-arm7_9 dcc_downloads enable\r
-\r
-# added from internet script\r
-armv4_5 core_state arm\r
-arm7_9 fast_memory_access enable\r
-# end added from script\r
-# end moved section\r
-\r
-# Init - taken from the script openocd_at91sam7_ecr.script\r
-mww 0xfffffd44 0x00008000 # disable watchdog\r
-mww 0xfffffd08 0xa5000001 # enable user reset\r
-mww 0xfffffc20 0x00000601 # CKGR_MOR : enable the main oscillator\r
-sleep 10\r
-mww 0xfffffc2c 0x00481c0e # CKGR_PLLR: 96.1097 MHz\r
-sleep 10\r
-mww 0xfffffc30 0x00000007 # PMC_MCKR : MCK = PLL / 2 ~= 48 MHz\r
-sleep 10\r
-mww 0xffffff60 0x003c0100 # MC_FMR: flash mode (FWS=1,FMCN=60)\r
-# arm7_9 force_hw_bkpts enable # program resides in flash\r
-sleep 10\r
-\r
-# section was here\r
-\r
-poll\r
-flash probe 0\r
-# added from script on internet\r
-#flash protect 0 0 31 off\r
-#flash erase_sector 0 0 31\r
-#flash erase_sector 0 0 31\r
-# end add from script\r
-#flash write_bank 0 blink1ROM_rom.bin 0x0\r
-flash write_image ../../../../images/at91sam7s.bin 0x0100000 bin\r
-\r
--- /dev/null
+#! /usr/bin/env bash
+set -x
+
+BASE_DIR=`dirname $0`
+INT_FILE=${BASE_DIR}/openocd/${PROGRAMMER_TYPE}.tcl
+CPU_FILE=${BASE_DIR}/openocd/${PROGRAMMER_CPU}.tcl
+
+if [ ! -f ${INT_FILE} ]; then
+ printf "Interface ${PROGRAMMER_TYPE} not supported\n";
+ exit 1;
+fi
+
+if [ ! -f ${CPU_FILE} ]; then
+ printf "CPU ${PROGRAMMER_CPU} not supported\n";
+ exit 1;
+fi
+
+sed -e "s#PROGRAMMER_TYPE#${INT_FILE}#" ${BASE_DIR}/openocd/flash.cfg | sed -e "s#PROGRAMMER_CPU#${CPU_FILE}#" > openocd.tmp
+++ /dev/null
-# Change the default telnet port...
-telnet_port 4444
-
-# Port for TCL connection.
-tcl_port 6666
-
-# GDB connects here
-gdb_port 3333
-gdb_memory_map enable
-
-interface ft2232
-ft2232_device_desc "Amontec JTAGkey"
-ft2232_layout jtagkey
-ft2232_vid_pid 0x0403 0xcff8
-
-
-#use combined on interfaces or targets that can't set TRST/SRST separately
-reset_config srst_only srst_pulls_trst
-
-if { [info exists CHIPNAME] } {
- set _CHIPNAME $CHIPNAME
-} else {
- set _CHIPNAME sam7
-}
-
-if { [info exists ENDIAN] } {
- set _ENDIAN $ENDIAN
-} else {
- set _ENDIAN little
-}
-
-if { [info exists CPUTAPID ] } {
- set _CPUTAPID $CPUTAPID
-} else {
- set _CPUTAPID 0x3f0f0f0f
-}
-
-jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
-
-set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
-target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm7tdmi
-
-$_TARGETNAME configure -event reset-start {
- # disable watchdog
- mww 0xfffffd44 0x00008000
- # enable user reset
- mww 0xfffffd08 0xa5000001
- # CKGR_MOR : enable the main oscillator
- mww 0xfffffc20 0x00000601
- sleep 10
- # CKGR_PLLR: 96.1097 MHz
- mww 0xfffffc2c 0x00481c0e
- sleep 10
- # PMC_MCKR : MCK = PLL / 2 ~= 48 MHz
- mww 0xfffffc30 0x00000007
- sleep 10
- # MC_FMR: flash mode (FWS=1,FMCN=60)
- mww 0xffffff60 0x003c0100
- sleep 10
- # reset PC
- reg pc 00000000
-}
-
-$_TARGETNAME configure -event gdb-detach {
- shutdown
-}
-
-$_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x00200000 -work-area-size 0x4000 -work-area-backup 0
-
-#flash bank <driver> <base> <size> <chip_width> <bus_width>
-flash bank at91sam7 0 0 0 0 0
+++ /dev/null
-# Change the default telnet port...
-telnet_port 4444
-
-# Port for TCL connection.
-tcl_port 6666
-
-# GDB connects here
-gdb_port 3333
-
-interface ft2232
-ft2232_device_desc "Amontec JTAGkey"
-ft2232_layout jtagkey
-ft2232_vid_pid 0x0403 0xcff8
-
-
-#use combined on interfaces or targets that can't set TRST/SRST separately
-reset_config srst_only srst_pulls_trst
-
-if { [info exists CHIPNAME] } {
- set _CHIPNAME $CHIPNAME
-} else {
- set _CHIPNAME sam7
-}
-
-if { [info exists ENDIAN] } {
- set _ENDIAN $ENDIAN
-} else {
- set _ENDIAN little
-}
-
-if { [info exists CPUTAPID ] } {
- set _CPUTAPID $CPUTAPID
-} else {
- set _CPUTAPID 0x3f0f0f0f
-}
-
-jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
-
-set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
-target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm7tdmi
-
-$_TARGETNAME configure -event reset-start "script at91sam7_write_to_flash.script"
-
-$_TARGETNAME configure -event reset-end "shutdown"
-
-$_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x00200000 -work-area-size 0x4000 -work-area-backup 0
-
-#flash bank <driver> <base> <size> <chip_width> <bus_width>
-flash bank at91sam7 0 0 0 0 0
-
-init
-reset run
--- /dev/null
+target remote localhost:3333
+monitor reset
+monitor sleep 500
+monitor poll
+monitor soft_reset_halt
+
+# WDT_MR, disable watchdog
+monitor mww 0xFFFFFD44 0x00008000
+
+# RSTC_MR, enable user reset
+monitor mww 0xfffffd08 0xa5000001
+
+# CKGR_MOR
+monitor mww 0xFFFFFC20 0x00000601
+monitor sleep 10
+
+# CKGR_PLLR
+monitor mww 0xFFFFFC2C 0x00481c0e
+monitor sleep 10
+
+# PMC_MCKR
+monitor mww 0xFFFFFC30 0x00000007
+monitor sleep 10
+
+# PMC_IER
+monitor mww 0xFFFFFF60 0x00480100
+monitor sleep 100
+
+#Remap RAM to address 0
+monitor mww 0xFFFFFF00 0x00000001
+monitor sleep 100
+
+break main
+load
+continue
--- /dev/null
+target remote localhost:3333\r
+monitor reset\r
+monitor sleep 500\r
+monitor poll\r
+monitor soft_reset_halt\r
+monitor arm7_9 sw_bkpts enable\r
+#monitor arm7_9 force_hw_bkpts enable\r
+# WDT_MR, disable watchdog \r
+monitor mww 0xFFFFFD44 0x00008000\r
+\r
+# RSTC_MR, enable user reset\r
+monitor mww 0xfffffd08 0xa5000001\r
+\r
+# CKGR_MOR\r
+monitor mww 0xFFFFFC20 0x00000601\r
+monitor sleep 10\r
+\r
+# CKGR_PLLR\r
+monitor mww 0xFFFFFC2C 0x00481c0e\r
+monitor sleep 10\r
+\r
+# PMC_MCKR\r
+monitor mww 0xFFFFFC30 0x00000007\r
+monitor sleep 10\r
+\r
+# PMC_IER\r
+monitor mww 0xFFFFFF60 0x00480100\r
+monitor sleep 100\r
+\r
+#Remap RAM to address 0\r
+monitor mww 0xFFFFFF00 0x00000001\r
+monitor sleep 100\r
+\r
+break main\r
+load\r
+continue\r
--- /dev/null
+target remote localhost:3333\r
+monitor reset\r
+monitor sleep 500\r
+monitor poll\r
+monitor soft_reset_halt\r
+#monitor arm7_9 sw_bkpts enable\r
+monitor arm7_9 force_hw_bkpts enable\r
+# WDT_MR, disable watchdog \r
+monitor mww 0xFFFFFD44 0x00008000\r
+\r
+# RSTC_MR, enable user reset\r
+monitor mww 0xfffffd08 0xa5000001\r
+\r
+# CKGR_MOR\r
+monitor mww 0xFFFFFC20 0x00000601\r
+monitor sleep 10\r
+\r
+# CKGR_PLLR\r
+monitor mww 0xFFFFFC2C 0x00481c0e\r
+monitor sleep 10\r
+\r
+# PMC_MCKR\r
+monitor mww 0xFFFFFC30 0x00000007\r
+monitor sleep 10\r
+\r
+# PMC_IER\r
+monitor mww 0xFFFFFF60 0x00480100\r
+monitor sleep 100\r
+\r
+#Remap RAM to address 0\r
+#monitor mww 0xFFFFFF00 0x00000001\r
+#monitor sleep 100\r
+\r
+break main\r
+load\r
+continue\r
--- /dev/null
+#\r
+# The following command wills be executed on\r
+# reset (because of run_and_init in the config-file)\r
+# - halt target\r
+# - init ecr\r
+# - flash content of file main.bin into target-memory\r
+# - shutdown openocd\r
+#\r
+# created by Martin Thomas\r
+# http://www.siwawi.arubi.uni-kl.de/avr_projects/arm_projects\r
+# based on information from Dominic Rath\r
+# modified for latest oocd - 4/29/09 -jkl\r
+#\r
+\r
+halt\r
+sleep 10\r
+\r
+# moved from below\r
+# AT91SAM7 flash command-"batch"\r
+# adapted by Martin Thomas based on information from Dominic Rath - Thanks\r
+arm7_9 dcc_downloads enable\r
+\r
+# added from internet script\r
+armv4_5 core_state arm\r
+arm7_9 fast_memory_access enable\r
+# end added from script\r
+# end moved section\r
+\r
+# Init - taken from the script openocd_at91sam7_ecr.script\r
+mww 0xfffffd44 0x00008000 # disable watchdog\r
+mww 0xfffffd08 0xa5000001 # enable user reset\r
+mww 0xfffffc20 0x00000601 # CKGR_MOR : enable the main oscillator\r
+sleep 10\r
+mww 0xfffffc2c 0x00481c0e # CKGR_PLLR: 96.1097 MHz\r
+sleep 10\r
+mww 0xfffffc30 0x00000007 # PMC_MCKR : MCK = PLL / 2 ~= 48 MHz\r
+sleep 10\r
+mww 0xffffff60 0x003c0100 # MC_FMR: flash mode (FWS=1,FMCN=60)\r
+# arm7_9 force_hw_bkpts enable # program resides in flash\r
+sleep 10\r
+\r
+# section was here\r
+\r
+poll\r
+flash probe 0\r
+# added from script on internet\r
+#flash protect 0 0 31 off\r
+#flash erase_sector 0 0 31\r
+#flash erase_sector 0 0 31\r
+# end add from script\r
+#flash write_bank 0 blink1ROM_rom.bin 0x0\r
+flash write_image ../../../../images/at91sam7s.bin 0x0100000 bin\r
+\r
--- /dev/null
+#use combined on interfaces or targets that can't set TRST/SRST separately
+reset_config srst_only srst_pulls_trst
+
+if { [info exists CHIPNAME] } {
+ set _CHIPNAME $CHIPNAME
+} else {
+ set _CHIPNAME sam7
+}
+
+if { [info exists ENDIAN] } {
+ set _ENDIAN $ENDIAN
+} else {
+ set _ENDIAN little
+}
+
+if { [info exists CPUTAPID ] } {
+ set _CPUTAPID $CPUTAPID
+} else {
+ set _CPUTAPID 0x3f0f0f0f
+}
+
+jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
+
+set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
+target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm7tdmi
+
+$_TARGETNAME configure -event reset-start [
+ halt
+ sleep 10
+
+ arm7_9 dcc_downloads enable
+
+ armv4_5 core_state arm
+ arm7_9 fast_memory_access enable
+
+ # Init - taken from the script openocd_at91sam7_ecr.script
+ mww 0xfffffd44 0x00008000 # disable watchdog
+ mww 0xfffffd08 0xa5000001 # enable user reset
+ mww 0xfffffc20 0x00000601 # CKGR_MOR : enable the main oscillator
+ sleep 10
+ mww 0xfffffc2c 0x00481c0e # CKGR_PLLR: 96.1097 MHz
+ sleep 10
+ mww 0xfffffc30 0x00000007 # PMC_MCKR : MCK = PLL / 2 ~= 48 MHz
+ sleep 10
+ mww 0xffffff60 0x003c0100 # MC_FMR: flash mode (FWS=1,FMCN=60)
+ # arm7_9 force_hw_bkpts enable # program resides in flash
+ sleep 10
+
+ poll
+ flash probe 0
+ flash write_image IMAGE_FILE 0x0100000 bin
+]
+
+#"script at91sam7_write_to_flash.script"
+
+$_TARGETNAME configure -event reset-end "shutdown"
+
+$_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x00200000 -work-area-size 0x4000 -work-area-backup 0
+
+#flash bank <driver> <base> <size> <chip_width> <bus_width>
+flash bank at91sam7 0 0 0 0 0
--- /dev/null
+# Change the default telnet port...
+telnet_port 4444
+
+# Port for TCL connection.
+tcl_port 6666
+
+# GDB connects here
+gdb_port 3333
+
+source [find PROGRAMMER_TYPE]
+
+source [find PROGRAMMER_CPU]
+
+init
+reset run
--- /dev/null
+interface ft2232
+ft2232_device_desc "Amontec JTAGkey"
+ft2232_layout jtagkey
+ft2232_vid_pid 0x0403 0xcff8
--- /dev/null
+# Change the default telnet port...
+telnet_port 4444
+
+# Port for TCL connection.
+tcl_port 6666
+
+# GDB connects here
+gdb_port 3333
+gdb_memory_map enable
+
+interface ft2232
+ft2232_device_desc "Amontec JTAGkey"
+ft2232_layout jtagkey
+ft2232_vid_pid 0x0403 0xcff8
+
+
+#use combined on interfaces or targets that can't set TRST/SRST separately
+reset_config srst_only srst_pulls_trst
+
+if { [info exists CHIPNAME] } {
+ set _CHIPNAME $CHIPNAME
+} else {
+ set _CHIPNAME sam7
+}
+
+if { [info exists ENDIAN] } {
+ set _ENDIAN $ENDIAN
+} else {
+ set _ENDIAN little
+}
+
+if { [info exists CPUTAPID ] } {
+ set _CPUTAPID $CPUTAPID
+} else {
+ set _CPUTAPID 0x3f0f0f0f
+}
+
+jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
+
+set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
+target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm7tdmi
+
+$_TARGETNAME configure -event reset-start {
+ # disable watchdog
+ mww 0xfffffd44 0x00008000
+ # enable user reset
+ mww 0xfffffd08 0xa5000001
+ # CKGR_MOR : enable the main oscillator
+ mww 0xfffffc20 0x00000601
+ sleep 10
+ # CKGR_PLLR: 96.1097 MHz
+ mww 0xfffffc2c 0x00481c0e
+ sleep 10
+ # PMC_MCKR : MCK = PLL / 2 ~= 48 MHz
+ mww 0xfffffc30 0x00000007
+ sleep 10
+ # MC_FMR: flash mode (FWS=1,FMCN=60)
+ mww 0xffffff60 0x003c0100
+ sleep 10
+ # reset PC
+ reg pc 00000000
+}
+
+$_TARGETNAME configure -event gdb-detach {
+ shutdown
+}
+
+$_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x00200000 -work-area-size 0x4000 -work-area-backup 0
+
+#flash bank <driver> <base> <size> <chip_width> <bus_width>
+flash bank at91sam7 0 0 0 0 0
--- /dev/null
+# Change the default telnet port...
+telnet_port 4444
+
+# Port for TCL connection.
+tcl_port 6666
+
+# GDB connects here
+gdb_port 3333
+
+# configurable interface
+source [find interface.tcl]
+
+# configurable cpu
+source [find cpu.tcl]
+
+init
+reset run
--- /dev/null
+# \r
+# The following command wills be executed on\r
+# reset (because of run_and_init in the config-file)\r
+# - halt target\r
+# - init ecr\r
+# - flash content of file main.bin into target-memory\r
+# - shutdown openocd\r
+#\r
+# created by Martin Thomas \r
+# http://www.siwawi.arubi.uni-kl.de/avr_projects/arm_projects\r
+# based on information from Dominic Rath \r
+#\r
+\r
+halt\r
+sleep 10\r
+\r
+# Init - taken form the script openocd_at91sam7_ecr.script \r
+mww 0xfffffd44 0x00008000 # disable watchdog\r
+mww 0xfffffd08 0xa5000001 # enable user reset\r
+mww 0xfffffc20 0x00000601 # CKGR_MOR : enable the main oscillator\r
+sleep 10\r
+mww 0xfffffc2c 0x00481c0e # CKGR_PLLR: 96.1097 MHz\r
+sleep 10\r
+mww 0xfffffc30 0x00000007 # PMC_MCKR : MCK = PLL / 2 ~= 48 MHz\r
+sleep 10\r
+mww 0xffffff60 0x003c0100 # MC_FMR: flash mode (FWS=1,FMCN=60)\r
+# arm7_9 force_hw_bkpts enable # program resides in flash\r
+\r
+# AT91SAM7 flash command-"batch"\r
+# adapted by Martin Thomas based on information from Dominic Rath - Thanks\r
+arm7_9 dcc_downloads enable\r
+sleep 10\r
+poll\r
+flash probe 0\r
+flash write 0 ../../../../images/at91sam7s.bin 0x0\r
+reset run\r
+sleep 10\r
+#shutdown\r
--- /dev/null
+#\r
+# Flash AT91SAM7S memory using openocd \r
+# and a FTDI FT2232-based JTAG-interface\r
+#\r
+# created by Martin Thomas \r
+# based on information from Dominic Rath\r
+#\r
+\r
+#daemon configuration\r
+telnet_port 4444\r
+gdb_port 3333\r
+\r
+#interface\r
+interface ft2232\r
+ft2232_device_desc "Amontec JTAGkey"\r
+ft2232_layout jtagkey\r
+ft2232_vid_pid 0x0403 0xcff8\r
+jtag_speed 0\r
+jtag_nsrst_delay 200\r
+jtag_ntrst_delay 200\r
+\r
+#use combined on interfaces or targets that can't set TRST/SRST separately\r
+reset_config srst_only srst_pulls_trst\r
+\r
+#jtag scan chain\r
+#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)\r
+jtag_device 4 0x1 0xf 0xe\r
+\r
+#target configuration\r
+daemon_startup reset\r
+\r
+#target <type> <startup mode>\r
+#target arm7tdmi <reset mode> <chainpos> <endianness> <variant>\r
+target arm7tdmi little run_and_init 0 arm7tdmi\r
+run_and_halt_time 0 30\r
+\r
+# flash-options AT91\r
+target_script 0 reset openocd_at91sam7_reset.script\r
+working_area 0 0x00200000 0x10000 nobackup\r
+flash bank at91sam7 0 0 0 0 0\r
+\r
+# Information: \r
+# erase command (telnet-interface) for complete flash:\r
+# flash erase <num> 0 numlockbits-1 (can be seen from output of flash info 0)\r
+# SAM7S64 with 16 lockbits and bank 0: flash erase 0 0 15\r
+# set/clear NVM-Bits:\r
+# at91sam7 gpnvm <num> <bit> <set|clear>\r
+# disable locking from SAM-BA\r
+# flash protect 0 0 1 off\r
+\r
+# For more information about the configuration files, take a look at:\r
+# http://openfacts.berlios.de/index-en.phtml?title=Open+On-Chip+Debugger\r
--- /dev/null
+#\r
+# Flash AT91SAM7S memory using openocd \r
+# and a FTDI FT2232-based JTAG-interface\r
+#\r
+# created by Martin Thomas \r
+# based on information from Dominic Rath\r
+#\r
+\r
+#daemon configuration\r
+telnet_port 4444\r
+gdb_port 3333\r
+\r
+#interface\r
+interface ft2232\r
+ft2232_device_desc "Amontec JTAGkey A"\r
+ft2232_layout jtagkey\r
+ft2232_vid_pid 0x0403 0xcff8\r
+jtag_speed 0\r
+jtag_nsrst_delay 200\r
+jtag_ntrst_delay 200\r
+\r
+#use combined on interfaces or targets that can't set TRST/SRST separately\r
+reset_config srst_only srst_pulls_trst\r
+\r
+#jtag scan chain\r
+#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)\r
+jtag_device 4 0x1 0xf 0xe\r
+\r
+#target configuration\r
+daemon_startup reset\r
+\r
+#target <type> <startup mode>\r
+#target arm7tdmi <reset mode> <chainpos> <endianness> <variant>\r
+target arm7tdmi little run_and_init 0 arm7tdmi\r
+run_and_halt_time 0 30\r
+\r
+# flash-options AT91\r
+target_script 0 reset openocd_at91sam7_reset.script\r
+working_area 0 0x00200000 0x10000 nobackup\r
+flash bank at91sam7 0 0 0 0 0\r
+\r
+# Information: \r
+# erase command (telnet-interface) for complete flash:\r
+# flash erase <num> 0 numlockbits-1 (can be seen from output of flash info 0)\r
+# SAM7S64 with 16 lockbits and bank 0: flash erase 0 0 15\r
+# set/clear NVM-Bits:\r
+# at91sam7 gpnvm <num> <bit> <set|clear>\r
+# disable locking from SAM-BA\r
+# flash protect 0 0 1 off\r
+\r
+# For more information about the configuration files, take a look at:\r
+# http://openfacts.berlios.de/index-en.phtml?title=Open+On-Chip+Debugger\r
--- /dev/null
+#\r
+# Flash AT91SAM7S memory using openocd \r
+# and a FTDI FT2232-based JTAG-interface\r
+#\r
+# created by Martin Thomas \r
+# based on information from Dominic Rath\r
+#\r
+\r
+#daemon configuration\r
+telnet_port 4444\r
+gdb_port 3333\r
+\r
+#interface\r
+interface ft2232\r
+ft2232_device_desc "Amontec JTAGkey"\r
+ft2232_layout jtagkey\r
+ft2232_vid_pid 0x0403 0xcff8\r
+jtag_speed 0\r
+jtag_nsrst_delay 200\r
+jtag_ntrst_delay 200\r
+\r
+#use combined on interfaces or targets that can't set TRST/SRST separately\r
+reset_config srst_only srst_pulls_trst\r
+\r
+#jtag scan chain\r
+#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)\r
+jtag_device 4 0x1 0xf 0xe\r
+\r
+#target configuration\r
+daemon_startup reset\r
+\r
+#target <type> <startup mode>\r
+#target arm7tdmi <reset mode> <chainpos> <endianness> <variant>\r
+target arm7tdmi little run_and_init 0 arm7tdmi\r
+run_and_halt_time 0 30\r
+\r
+# flash-options AT91\r
+target_script 0 reset openocd_at91sam7_flash.script\r
+working_area 0 0x00100000 0x40000 nobackup\r
+flash bank at91sam7 0 0 0 0 0\r
+\r
+# Information: \r
+# erase command (telnet-interface) for complete flash:\r
+# flash erase <num> 0 numlockbits-1 (can be seen from output of flash info 0)\r
+# SAM7S64 with 16 lockbits and bank 0: flash erase 0 0 15\r
+# set/clear NVM-Bits:\r
+# at91sam7 gpnvm <num> <bit> <set|clear>\r
+# disable locking from SAM-BA\r
+# flash protect 0 0 1 off\r
+\r
+# For more information about the configuration files, take a look at:\r
+# http://openfacts.berlios.de/index-en.phtml?title=Open+On-Chip+Debugger\r
--- /dev/null
+#\r
+# Flash AT91SAM7S memory using openocd \r
+# and a FTDI FT2232-based JTAG-interface\r
+#\r
+# created by Martin Thomas \r
+# based on information from Dominic Rath\r
+#\r
+\r
+#daemon configuration\r
+telnet_port 4444\r
+gdb_port 3333\r
+\r
+#interface\r
+interface ft2232\r
+ft2232_device_desc "Amontec JTAGkey A"\r
+ft2232_layout jtagkey\r
+ft2232_vid_pid 0x0403 0xcff8\r
+jtag_speed 0\r
+jtag_nsrst_delay 200\r
+jtag_ntrst_delay 200\r
+\r
+#use combined on interfaces or targets that can't set TRST/SRST separately\r
+reset_config srst_only srst_pulls_trst\r
+\r
+#jtag scan chain\r
+#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)\r
+jtag_device 4 0x1 0xf 0xe\r
+\r
+#target configuration\r
+daemon_startup reset\r
+\r
+#target <type> <startup mode>\r
+#target arm7tdmi <reset mode> <chainpos> <endianness> <variant>\r
+target arm7tdmi little run_and_init 0 arm7tdmi\r
+run_and_halt_time 0 30\r
+\r
+# flash-options AT91\r
+target_script 0 reset openocd_at91sam7_flash.script\r
+working_area 0 0x00100000 0x40000 nobackup\r
+flash bank at91sam7 0 0 0 0 0\r
+\r
+# Information: \r
+# erase command (telnet-interface) for complete flash:\r
+# flash erase <num> 0 numlockbits-1 (can be seen from output of flash info 0)\r
+# SAM7S64 with 16 lockbits and bank 0: flash erase 0 0 15\r
+# set/clear NVM-Bits:\r
+# at91sam7 gpnvm <num> <bit> <set|clear>\r
+# disable locking from SAM-BA\r
+# flash protect 0 0 1 off\r
+\r
+# For more information about the configuration files, take a look at:\r
+# http://openfacts.berlios.de/index-en.phtml?title=Open+On-Chip+Debugger\r
--- /dev/null
+#\r
+# Init - taken form the script openocd_at91sam7_ecr.script \r
+#\r
+# I take this script from the following page:\r
+#\r
+# http://www.siwawi.arubi.uni-kl.de/avr_projects/arm_projects/openocd_intro/index.html\r
+#\r
+mww 0xfffffd44 0x00008000 # disable watchdog\r
+mww 0xfffffd08 0xa5000001 # enable user reset\r
+mww 0xfffffc20 0x00000601 # CKGR_MOR : enable the main oscillator\r
+sleep 10\r
+mww 0xfffffc2c 0x00481c0e # CKGR_PLLR: 96.1097 MHz\r
+sleep 10\r
+mww 0xfffffc30 0x00000007 # PMC_MCKR : MCK = PLL / 2 ~= 48 MHz\r
+sleep 10\r
+mww 0xffffff60 0x003c0100 # MC_FMR: flash mode (FWS=1,FMCN=60)\r
+sleep 100\r
--- /dev/null
+
+# Change the default telnet port...
+telnet_port 4444
+
+# Port for TCL connection.
+tcl_port 6666
+
+# GDB connects here
+gdb_port 3333
+# GDB can also flash my flash!
+gdb_memory_map enable
+gdb_flash_program disable
+gdb_breakpoint_override soft
+
+interface ft2232
+#ft2232_device_desc "Amontec JTAGkey"
+ft2232_layout jtagkey
+ft2232_vid_pid 0x0403 0xcff8
+
+#use combined on interfaces or targets that can't set TRST/SRST separately
+reset_config srst_only srst_pulls_trst
+
+if { [info exists CHIPNAME] } {
+ set _CHIPNAME $CHIPNAME
+} else {
+ set _CHIPNAME sam7
+}
+
+if { [info exists ENDIAN] } {
+ set _ENDIAN $ENDIAN
+} else {
+ set _ENDIAN little
+}
+
+if { [info exists CPUTAPID ] } {
+ set _CPUTAPID $CPUTAPID
+} else {
+ set _CPUTAPID 0x3f0f0f0f
+}
+
+jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
+
+set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
+target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm7tdmi
+
+$_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x00200000 -work-area-size 0x4000 -work-area-backup 0
+
+#flash bank <driver> <base> <size> <chip_width> <bus_width>
+flash bank at91sam7 0 0 0 0 0
--- /dev/null
+
+# Change the default telnet port...
+telnet_port 4444
+
+# Port for TCL connection.
+tcl_port 6666
+
+# GDB connects here
+gdb_port 3333
+# GDB can also flash my flash!
+gdb_memory_map enable
+gdb_flash_program enable
+gdb_breakpoint_override hard
+
+interface ft2232
+#ft2232_device_desc "Amontec JTAGkey"
+ft2232_layout jtagkey
+ft2232_vid_pid 0x0403 0xcff8
+
+
+#use combined on interfaces or targets that can't set TRST/SRST separately
+reset_config srst_only srst_pulls_trst
+
+if { [info exists CHIPNAME] } {
+ set _CHIPNAME $CHIPNAME
+} else {
+ set _CHIPNAME sam7
+}
+
+if { [info exists ENDIAN] } {
+ set _ENDIAN $ENDIAN
+} else {
+ set _ENDIAN little
+}
+
+if { [info exists CPUTAPID ] } {
+ set _CPUTAPID $CPUTAPID
+} else {
+ set _CPUTAPID 0x3f0f0f0f
+}
+
+jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
+
+set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
+target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm7tdmi
+
+$_TARGETNAME configure -event reset-init {
+ # disable watchdog
+ mww 0xfffffd44 0x00008000
+ # enable user reset
+ mww 0xfffffd08 0xa5000001
+ # CKGR_MOR : enable the main oscillator
+ mww 0xfffffc20 0x00000601
+ sleep 10
+ # CKGR_PLLR: 96.1097 MHz
+ mww 0xfffffc2c 0x00481c0e
+ sleep 10
+ # PMC_MCKR : MCK = PLL / 2 ~= 48 MHz
+ mww 0xfffffc30 0x00000007
+ sleep 10
+ # MC_FMR: flash mode (FWS=1,FMCN=60)
+ mww 0xffffff60 0x003c0100
+ sleep 100
+}
+
+$_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x00200000 -work-area-size 0x4000 -work-area-backup 0
+
+#flash bank <driver> <base> <size> <chip_width> <bus_width>
+flash bank at91sam7 0 0 0 0 0
--- /dev/null
+openocd-ftd2xx.exe -f openocd_at91sam7_ftdi_ram_win.cfg
--- /dev/null
+openocd-ftd2xx.exe -f openocd_at91sam7_ftdi_rom_win.cfg
+++ /dev/null
-# \r
-# The following command wills be executed on\r
-# reset (because of run_and_init in the config-file)\r
-# - halt target\r
-# - init ecr\r
-# - flash content of file main.bin into target-memory\r
-# - shutdown openocd\r
-#\r
-# created by Martin Thomas \r
-# http://www.siwawi.arubi.uni-kl.de/avr_projects/arm_projects\r
-# based on information from Dominic Rath \r
-#\r
-\r
-halt\r
-sleep 10\r
-\r
-# Init - taken form the script openocd_at91sam7_ecr.script \r
-mww 0xfffffd44 0x00008000 # disable watchdog\r
-mww 0xfffffd08 0xa5000001 # enable user reset\r
-mww 0xfffffc20 0x00000601 # CKGR_MOR : enable the main oscillator\r
-sleep 10\r
-mww 0xfffffc2c 0x00481c0e # CKGR_PLLR: 96.1097 MHz\r
-sleep 10\r
-mww 0xfffffc30 0x00000007 # PMC_MCKR : MCK = PLL / 2 ~= 48 MHz\r
-sleep 10\r
-mww 0xffffff60 0x003c0100 # MC_FMR: flash mode (FWS=1,FMCN=60)\r
-# arm7_9 force_hw_bkpts enable # program resides in flash\r
-\r
-# AT91SAM7 flash command-"batch"\r
-# adapted by Martin Thomas based on information from Dominic Rath - Thanks\r
-arm7_9 dcc_downloads enable\r
-sleep 10\r
-poll\r
-flash probe 0\r
-flash write 0 ../../../../images/at91sam7s.bin 0x0\r
-reset run\r
-sleep 10\r
-#shutdown\r
+++ /dev/null
-#\r
-# Flash AT91SAM7S memory using openocd \r
-# and a FTDI FT2232-based JTAG-interface\r
-#\r
-# created by Martin Thomas \r
-# based on information from Dominic Rath\r
-#\r
-\r
-#daemon configuration\r
-telnet_port 4444\r
-gdb_port 3333\r
-\r
-#interface\r
-interface ft2232\r
-ft2232_device_desc "Amontec JTAGkey"\r
-ft2232_layout jtagkey\r
-ft2232_vid_pid 0x0403 0xcff8\r
-jtag_speed 0\r
-jtag_nsrst_delay 200\r
-jtag_ntrst_delay 200\r
-\r
-#use combined on interfaces or targets that can't set TRST/SRST separately\r
-reset_config srst_only srst_pulls_trst\r
-\r
-#jtag scan chain\r
-#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)\r
-jtag_device 4 0x1 0xf 0xe\r
-\r
-#target configuration\r
-daemon_startup reset\r
-\r
-#target <type> <startup mode>\r
-#target arm7tdmi <reset mode> <chainpos> <endianness> <variant>\r
-target arm7tdmi little run_and_init 0 arm7tdmi\r
-run_and_halt_time 0 30\r
-\r
-# flash-options AT91\r
-target_script 0 reset openocd_at91sam7_reset.script\r
-working_area 0 0x00200000 0x10000 nobackup\r
-flash bank at91sam7 0 0 0 0 0\r
-\r
-# Information: \r
-# erase command (telnet-interface) for complete flash:\r
-# flash erase <num> 0 numlockbits-1 (can be seen from output of flash info 0)\r
-# SAM7S64 with 16 lockbits and bank 0: flash erase 0 0 15\r
-# set/clear NVM-Bits:\r
-# at91sam7 gpnvm <num> <bit> <set|clear>\r
-# disable locking from SAM-BA\r
-# flash protect 0 0 1 off\r
-\r
-# For more information about the configuration files, take a look at:\r
-# http://openfacts.berlios.de/index-en.phtml?title=Open+On-Chip+Debugger\r
+++ /dev/null
-#\r
-# Flash AT91SAM7S memory using openocd \r
-# and a FTDI FT2232-based JTAG-interface\r
-#\r
-# created by Martin Thomas \r
-# based on information from Dominic Rath\r
-#\r
-\r
-#daemon configuration\r
-telnet_port 4444\r
-gdb_port 3333\r
-\r
-#interface\r
-interface ft2232\r
-ft2232_device_desc "Amontec JTAGkey A"\r
-ft2232_layout jtagkey\r
-ft2232_vid_pid 0x0403 0xcff8\r
-jtag_speed 0\r
-jtag_nsrst_delay 200\r
-jtag_ntrst_delay 200\r
-\r
-#use combined on interfaces or targets that can't set TRST/SRST separately\r
-reset_config srst_only srst_pulls_trst\r
-\r
-#jtag scan chain\r
-#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)\r
-jtag_device 4 0x1 0xf 0xe\r
-\r
-#target configuration\r
-daemon_startup reset\r
-\r
-#target <type> <startup mode>\r
-#target arm7tdmi <reset mode> <chainpos> <endianness> <variant>\r
-target arm7tdmi little run_and_init 0 arm7tdmi\r
-run_and_halt_time 0 30\r
-\r
-# flash-options AT91\r
-target_script 0 reset openocd_at91sam7_reset.script\r
-working_area 0 0x00200000 0x10000 nobackup\r
-flash bank at91sam7 0 0 0 0 0\r
-\r
-# Information: \r
-# erase command (telnet-interface) for complete flash:\r
-# flash erase <num> 0 numlockbits-1 (can be seen from output of flash info 0)\r
-# SAM7S64 with 16 lockbits and bank 0: flash erase 0 0 15\r
-# set/clear NVM-Bits:\r
-# at91sam7 gpnvm <num> <bit> <set|clear>\r
-# disable locking from SAM-BA\r
-# flash protect 0 0 1 off\r
-\r
-# For more information about the configuration files, take a look at:\r
-# http://openfacts.berlios.de/index-en.phtml?title=Open+On-Chip+Debugger\r
+++ /dev/null
-#\r
-# Flash AT91SAM7S memory using openocd \r
-# and a FTDI FT2232-based JTAG-interface\r
-#\r
-# created by Martin Thomas \r
-# based on information from Dominic Rath\r
-#\r
-\r
-#daemon configuration\r
-telnet_port 4444\r
-gdb_port 3333\r
-\r
-#interface\r
-interface ft2232\r
-ft2232_device_desc "Amontec JTAGkey"\r
-ft2232_layout jtagkey\r
-ft2232_vid_pid 0x0403 0xcff8\r
-jtag_speed 0\r
-jtag_nsrst_delay 200\r
-jtag_ntrst_delay 200\r
-\r
-#use combined on interfaces or targets that can't set TRST/SRST separately\r
-reset_config srst_only srst_pulls_trst\r
-\r
-#jtag scan chain\r
-#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)\r
-jtag_device 4 0x1 0xf 0xe\r
-\r
-#target configuration\r
-daemon_startup reset\r
-\r
-#target <type> <startup mode>\r
-#target arm7tdmi <reset mode> <chainpos> <endianness> <variant>\r
-target arm7tdmi little run_and_init 0 arm7tdmi\r
-run_and_halt_time 0 30\r
-\r
-# flash-options AT91\r
-target_script 0 reset openocd_at91sam7_flash.script\r
-working_area 0 0x00100000 0x40000 nobackup\r
-flash bank at91sam7 0 0 0 0 0\r
-\r
-# Information: \r
-# erase command (telnet-interface) for complete flash:\r
-# flash erase <num> 0 numlockbits-1 (can be seen from output of flash info 0)\r
-# SAM7S64 with 16 lockbits and bank 0: flash erase 0 0 15\r
-# set/clear NVM-Bits:\r
-# at91sam7 gpnvm <num> <bit> <set|clear>\r
-# disable locking from SAM-BA\r
-# flash protect 0 0 1 off\r
-\r
-# For more information about the configuration files, take a look at:\r
-# http://openfacts.berlios.de/index-en.phtml?title=Open+On-Chip+Debugger\r
+++ /dev/null
-#\r
-# Flash AT91SAM7S memory using openocd \r
-# and a FTDI FT2232-based JTAG-interface\r
-#\r
-# created by Martin Thomas \r
-# based on information from Dominic Rath\r
-#\r
-\r
-#daemon configuration\r
-telnet_port 4444\r
-gdb_port 3333\r
-\r
-#interface\r
-interface ft2232\r
-ft2232_device_desc "Amontec JTAGkey A"\r
-ft2232_layout jtagkey\r
-ft2232_vid_pid 0x0403 0xcff8\r
-jtag_speed 0\r
-jtag_nsrst_delay 200\r
-jtag_ntrst_delay 200\r
-\r
-#use combined on interfaces or targets that can't set TRST/SRST separately\r
-reset_config srst_only srst_pulls_trst\r
-\r
-#jtag scan chain\r
-#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)\r
-jtag_device 4 0x1 0xf 0xe\r
-\r
-#target configuration\r
-daemon_startup reset\r
-\r
-#target <type> <startup mode>\r
-#target arm7tdmi <reset mode> <chainpos> <endianness> <variant>\r
-target arm7tdmi little run_and_init 0 arm7tdmi\r
-run_and_halt_time 0 30\r
-\r
-# flash-options AT91\r
-target_script 0 reset openocd_at91sam7_flash.script\r
-working_area 0 0x00100000 0x40000 nobackup\r
-flash bank at91sam7 0 0 0 0 0\r
-\r
-# Information: \r
-# erase command (telnet-interface) for complete flash:\r
-# flash erase <num> 0 numlockbits-1 (can be seen from output of flash info 0)\r
-# SAM7S64 with 16 lockbits and bank 0: flash erase 0 0 15\r
-# set/clear NVM-Bits:\r
-# at91sam7 gpnvm <num> <bit> <set|clear>\r
-# disable locking from SAM-BA\r
-# flash protect 0 0 1 off\r
-\r
-# For more information about the configuration files, take a look at:\r
-# http://openfacts.berlios.de/index-en.phtml?title=Open+On-Chip+Debugger\r
+++ /dev/null
-#\r
-# Init - taken form the script openocd_at91sam7_ecr.script \r
-#\r
-# I take this script from the following page:\r
-#\r
-# http://www.siwawi.arubi.uni-kl.de/avr_projects/arm_projects/openocd_intro/index.html\r
-#\r
-mww 0xfffffd44 0x00008000 # disable watchdog\r
-mww 0xfffffd08 0xa5000001 # enable user reset\r
-mww 0xfffffc20 0x00000601 # CKGR_MOR : enable the main oscillator\r
-sleep 10\r
-mww 0xfffffc2c 0x00481c0e # CKGR_PLLR: 96.1097 MHz\r
-sleep 10\r
-mww 0xfffffc30 0x00000007 # PMC_MCKR : MCK = PLL / 2 ~= 48 MHz\r
-sleep 10\r
-mww 0xffffff60 0x003c0100 # MC_FMR: flash mode (FWS=1,FMCN=60)\r
-sleep 100\r
+++ /dev/null
-
-# Change the default telnet port...
-telnet_port 4444
-
-# Port for TCL connection.
-tcl_port 6666
-
-# GDB connects here
-gdb_port 3333
-# GDB can also flash my flash!
-gdb_memory_map enable
-gdb_flash_program disable
-gdb_breakpoint_override soft
-
-interface ft2232
-#ft2232_device_desc "Amontec JTAGkey"
-ft2232_layout jtagkey
-ft2232_vid_pid 0x0403 0xcff8
-
-#use combined on interfaces or targets that can't set TRST/SRST separately
-reset_config srst_only srst_pulls_trst
-
-if { [info exists CHIPNAME] } {
- set _CHIPNAME $CHIPNAME
-} else {
- set _CHIPNAME sam7
-}
-
-if { [info exists ENDIAN] } {
- set _ENDIAN $ENDIAN
-} else {
- set _ENDIAN little
-}
-
-if { [info exists CPUTAPID ] } {
- set _CPUTAPID $CPUTAPID
-} else {
- set _CPUTAPID 0x3f0f0f0f
-}
-
-jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
-
-set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
-target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm7tdmi
-
-$_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x00200000 -work-area-size 0x4000 -work-area-backup 0
-
-#flash bank <driver> <base> <size> <chip_width> <bus_width>
-flash bank at91sam7 0 0 0 0 0
+++ /dev/null
-
-# Change the default telnet port...
-telnet_port 4444
-
-# Port for TCL connection.
-tcl_port 6666
-
-# GDB connects here
-gdb_port 3333
-# GDB can also flash my flash!
-gdb_memory_map enable
-gdb_flash_program enable
-gdb_breakpoint_override hard
-
-interface ft2232
-#ft2232_device_desc "Amontec JTAGkey"
-ft2232_layout jtagkey
-ft2232_vid_pid 0x0403 0xcff8
-
-
-#use combined on interfaces or targets that can't set TRST/SRST separately
-reset_config srst_only srst_pulls_trst
-
-if { [info exists CHIPNAME] } {
- set _CHIPNAME $CHIPNAME
-} else {
- set _CHIPNAME sam7
-}
-
-if { [info exists ENDIAN] } {
- set _ENDIAN $ENDIAN
-} else {
- set _ENDIAN little
-}
-
-if { [info exists CPUTAPID ] } {
- set _CPUTAPID $CPUTAPID
-} else {
- set _CPUTAPID 0x3f0f0f0f
-}
-
-jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
-
-set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
-target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm7tdmi
-
-$_TARGETNAME configure -event reset-init {
- # disable watchdog
- mww 0xfffffd44 0x00008000
- # enable user reset
- mww 0xfffffd08 0xa5000001
- # CKGR_MOR : enable the main oscillator
- mww 0xfffffc20 0x00000601
- sleep 10
- # CKGR_PLLR: 96.1097 MHz
- mww 0xfffffc2c 0x00481c0e
- sleep 10
- # PMC_MCKR : MCK = PLL / 2 ~= 48 MHz
- mww 0xfffffc30 0x00000007
- sleep 10
- # MC_FMR: flash mode (FWS=1,FMCN=60)
- mww 0xffffff60 0x003c0100
- sleep 100
-}
-
-$_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x00200000 -work-area-size 0x4000 -work-area-backup 0
-
-#flash bank <driver> <base> <size> <chip_width> <bus_width>
-flash bank at91sam7 0 0 0 0 0
+++ /dev/null
-openocd-ftd2xx.exe -f openocd_at91sam7_ftdi_ram_win.cfg
+++ /dev/null
-openocd-ftd2xx.exe -f openocd_at91sam7_ftdi_rom_win.cfg
projects / bertos.git / commitdiff