Move embedded flash definition into cpu family header.

git-svn-id: https://src.develer.com/svnoss/bertos/trunk@4170 38d2e660-2303-0410-9eaa-f027e97ec537

diff --git a/bertos/cpu/cortex-m3/drv/flash_lm3s.c b/bertos/cpu/cortex-m3/drv/flash_lm3s.c
index 563b222906fad1c4b745aa9160cc130d247fcc5d..83f153f13d83695b05f4d5fa9697ba0f9425260c 100644 (file)
--- a/bertos/cpu/cortex-m3/drv/flash_lm3s.c
+++ b/bertos/cpu/cortex-m3/drv/flash_lm3s.c
@@ -178,16 +178,8 @@ static const KBlockVTable flash_lm3s_unbuffered_vt =
        .clearerr = lm3s_flash_clearerror,
 };
 
-/* Flash memory mapping */
-#if CPU_CM3_LM3S1968
-       #define EMB_FLASH_SIZE               0x40000 //< 256KiB
-       #define EMB_FLASH_PAGE_SIZE          0x400   //< 1KiB
-#else
-       #error Unknown CPU
-#endif
-
 static struct FlashHardware flash_lm3s_hw;
-static uint8_t flash_buf[EMB_FLASH_PAGE_SIZE];
+static uint8_t flash_buf[FLASH_PAGE_SIZE];
 
 static void common_init(Flash *fls)
 {
@@ -198,8 +190,8 @@ static void common_init(Flash *fls)
 
        fls->hw = &flash_lm3s_hw;
 
-       fls->blk.blk_size = EMB_FLASH_PAGE_SIZE;
-       fls->blk.blk_cnt =  EMB_FLASH_SIZE / EMB_FLASH_PAGE_SIZE;
+       fls->blk.blk_size = FLASH_PAGE_SIZE;
+       fls->blk.blk_cnt =  FLASH_SIZE / FLASH_PAGE_SIZE;
 }
 
 

diff --git a/bertos/cpu/cortex-m3/drv/flash_stm32.c b/bertos/cpu/cortex-m3/drv/flash_stm32.c
index d3e82b28b5f379d0a1058f7eb152e26e1c84af91..68b3cdaff630e58af8906c8ea8b023e8f34e362d 100644 (file)
--- a/bertos/cpu/cortex-m3/drv/flash_stm32.c
+++ b/bertos/cpu/cortex-m3/drv/flash_stm32.c
@@ -56,13 +56,6 @@
 
 #define EMB_FLASH                ((struct stm32_flash*)FLASH_R_BASE)
 
-#if CPU_CM3_STM32F103RB
-       #define EMB_FLASH_PAGE_SIZE   1024
-#else
-       #error Unknown CPU
-#endif
-
-
 struct FlashHardware
 {
        uint8_t status;
@@ -216,19 +209,17 @@ static const KBlockVTable flash_stm32_unbuffered_vt =
 };
 
 static struct FlashHardware flash_stm32_hw;
-static uint8_t flash_buf[EMB_FLASH_PAGE_SIZE];
+static uint8_t flash_buf[FLASH_PAGE_SIZE];
 
 static void common_init(Flash *fls)
 {
        memset(fls, 0, sizeof(*fls));
        DB(fls->blk.priv.type = KBT_FLASH);
 
-       EMB_FLASH->CR = 0;
-
        fls->hw = &flash_stm32_hw;
 
-       fls->blk.blk_size = EMB_FLASH_PAGE_SIZE;
-       fls->blk.blk_cnt = (F_SIZE * 1024) / EMB_FLASH_PAGE_SIZE;
+       fls->blk.blk_size = FLASH_PAGE_SIZE;
+       fls->blk.blk_cnt = (F_SIZE * 1024) / FLASH_PAGE_SIZE;
 
        /* Unlock flash memory for the FPEC Access */
        EMB_FLASH->KEYR = FLASH_KEY1;

diff --git a/bertos/cpu/cortex-m3/io/lm3s.h b/bertos/cpu/cortex-m3/io/lm3s.h
index 98b1ffb769e10255e28e693d7b6876aa17d7482e..af8153847707e4e46abae4dfa9eeffe5d45f4c67 100644 (file)
--- a/bertos/cpu/cortex-m3/io/lm3s.h
+++ b/bertos/cpu/cortex-m3/io/lm3s.h
@@ -61,4 +61,13 @@
        #error No i2c pins are defined for select cpu
 #endif
 
+
+/* Flash memory mapping */
+#if CPU_CM3_LM3S1968
+       #define FLASH_SIZE               0x40000 //< 256KiB
+       #define FLASH_PAGE_SIZE          0x400   //< 1KiB
+#else
+       #error No embedded definition for select cpu
+#endif
+
 #endif /* LM3S_H */

diff --git a/bertos/cpu/cortex-m3/io/stm32.h b/bertos/cpu/cortex-m3/io/stm32.h
index b41b5c7602a2ecbe8bf0676050e52dc2be3d98e0..9c2fe1df610bc4abdbdf6ae34c9eea22dac48734 100644 (file)
--- a/bertos/cpu/cortex-m3/io/stm32.h
+++ b/bertos/cpu/cortex-m3/io/stm32.h
@@ -51,17 +51,30 @@
 #include "stm32_i2c.h"
 #include "stm32_flash.h"
 
-#define GPIO_USART1_TX_PIN     BV(9)
-#define GPIO_USART1_RX_PIN     BV(10)
-#define GPIO_USART2_TX_PIN     BV(2)
-#define GPIO_USART2_RX_PIN     BV(3)
-#define GPIO_USART3_TX_PIN     BV(10)
-#define GPIO_USART3_RX_PIN     BV(11)
+#if CPU_CM3_STM32F103RB
+       #define GPIO_USART1_TX_PIN      BV(9)
+       #define GPIO_USART1_RX_PIN      BV(10)
+       #define GPIO_USART2_TX_PIN      BV(2)
+       #define GPIO_USART2_RX_PIN      BV(3)
+       #define GPIO_USART3_TX_PIN      BV(10)
+       #define GPIO_USART3_RX_PIN      BV(11)
+#else
+       #error No USART pins are defined for select cpu
+#endif
 
+#if CPU_CM3_STM32F103RB
+       #define GPIO_I2C1_SCL_PIN       BV(6)
+       #define GPIO_I2C1_SDA_PIN       BV(7)
+       #define GPIO_I2C2_SCL_PIN       BV(10)
+       #define GPIO_I2C2_SDA_PIN       BV(11)
+#else
+       #error No i2c pins are defined for select cpu
+#endif
 
-#define GPIO_I2C1_SCL_PIN      BV(6)
-#define GPIO_I2C1_SDA_PIN      BV(7)
-#define GPIO_I2C2_SCL_PIN      BV(10)
-#define GPIO_I2C2_SDA_PIN      BV(11)
+#if CPU_CM3_STM32F103RB
+       #define FLASH_PAGE_SIZE   1024
+#else
+       #error No embedded definition for select cpu
+#endif
 
 #endif /* STM32_H */