*
* \param af Afsk context to operate one (\see Afsk).
*
- * \note The next DAC output sample is supplied by the Afsk driver through calling
- * the AFSK_DAC_SET() callback.
+ * \return The next DAC output sample.
*/
-void afsk_dac_isr(Afsk *af)
+uint8_t afsk_dac_isr(Afsk *af)
{
/* Check if we are at a start of a sample cycle */
if (af->sample_count == 0)
{
AFSK_DAC_IRQ_STOP(af->dac_ch);
af->sending = false;
- return;
+ return 0;
}
else
{
{
AFSK_DAC_IRQ_STOP(af->dac_ch);
af->sending = false;
- return;
+ return 0;
}
else
af->curr_out = fifo_pop(&af->tx_fifo);
af->phase_acc += af->phase_inc;
af->phase_acc %= SIN_LEN;
- AFSK_DAC_SET(af->dac_ch, sin_sample(af->phase_acc));
af->sample_count--;
+ return sin_sample(af->phase_acc);
}
void afsk_adc_isr(Afsk *af, int8_t sample);
-void afsk_dac_isr(Afsk *af);
+uint8_t afsk_dac_isr(Afsk *af);
void afsk_init(Afsk *af, int adc_ch, int dac_ch);
ax25_send(&ax25, AX25_CALL("abcdef", 0), AX25_CALL("123456", 1), buf, sizeof(buf));
while (afsk_tx_test)
- afsk_dac_isr(&afsk_fd);
-
+ {
+ int8_t val = afsk_dac_isr(&afsk_fd) - 128;
+ ASSERT(fwrite(&val, 1, sizeof(val), fp_dac) == sizeof(val));
+ data_written++;
+ }
#define SND_DATASIZE_OFF 8
#if CPU_AVR