{
struct stm32_usart *base = (struct stm32_usart *)UARTDesc[port].base;
- kprintf("init port[%d]cnt[%d]\n", port, SER_CNT);
ASSERT(port >= 0 && port < SER_CNT);
/* Enable clocking on AFIO */
/* Enable trasmision and receiver */
base->CR1 |= (BV(CR1_TE) | BV(CR1_RE));
-
- kprintf("INIT[%02x]\n", (uint8_t)base->SR); \
-
}
static bool tx_sending(struct SerialHardware *_hw)
* Disable TX empty interrupts if there're no more
* characters to transmit.
*/
- base->CR1 &= ~BV(7);
+ base->CR1 &= ~BV(CR1_TXEIE);
UARTDesc[port].sending = false;
}
else
/* Read and clear the IRQ status */
status = base->SR;
/* Process the IRQ */
- if (status & BV(5))
+ if (status & BV(CR1_RXNEIE))
{
uart_irq_rx(port);
}
- if (status & (BV(7) | BV(6)))
+ if (status & (BV(CR1_TXEIE) | BV(CR1_TCIE)))
{
uart_irq_tx(port);
}
/* Register the IRQ handler */
sysirq_setHandler(UARTDesc[port].irq, handler);
- base->CR1 |= BV(5);
+ base->CR1 |= BV(CR1_RXNEIE);
}
static void stm32_uartIRQDisable(int port)
{
struct stm32_usart *base = (struct stm32_usart *)UARTDesc[port].base;
- base->CR1 &= ~(BV(5) | USART_FLAG_TXE);
+ base->CR1 &= ~(BV(CR1_RXNEIE) | USART_FLAG_TXE);
}
stm32_uartPutChar(USART ## port ## _BASE, fifo_pop(txfifo)); \
if (!fifo_isempty(txfifo)) \
{ \
- kputs("tx_en_irq\n"); \
hw->sending = true; \
- base->CR1 |= BV(7); \
+ base->CR1 |= BV(CR1_TXEIE); \
} \
} \
\
INLINE bool stm32_uartTxReady(uint32_t base)
{
struct stm32_usart *_base = (struct stm32_usart *)base;
- return (_base->SR & (BV(7) | BV(6)));
+ return (_base->SR & (BV(CR1_TXEIE) | BV(CR1_TCIE)));
}
INLINE bool stm32_uartRxReady(uint32_t base)
{
struct stm32_usart *_base = (struct stm32_usart *)base;
- return (_base->SR & BV(5));
+ return (_base->SR & BV(CR1_RXNEIE));
}
INLINE int stm32_uartPutChar(uint32_t base, unsigned char c)