Add support for STM32F103RE CPU.

Signed-off-by: Xavier Lagorce <Xavier.Lagorce@crans.org>
git-svn-id: https://src.develer.com/svnoss/bertos/trunk@4721 38d2e660-2303-0410-9eaa-f027e97ec537

diff --git a/bertos/cpu/cortex-m3/drv/ser_stm32.c b/bertos/cpu/cortex-m3/drv/ser_stm32.c
index eb88e6e6efbc1b33ba6e8d70d378a8a0abac7d9c..0b8c4f32acfed9162846cd1d52b8d97f00f6d18e 100644 (file)
--- a/bertos/cpu/cortex-m3/drv/ser_stm32.c
+++ b/bertos/cpu/cortex-m3/drv/ser_stm32.c
@@ -96,7 +96,7 @@ static const struct gpio_uart_info gpio_uart[SER_CNT] =
                .sysctl_gpio = RCC_APB2_GPIOA,
                .sysctl_usart = RCC_APB1_USART2,
        },
-#if CPU_CM3_STM32F103RB
+#if CPU_CM3_STM32F103RB || CPU_CM3_STM32F103RE
        /* UART3 */
        {
                .base = GPIOB_BASE,
@@ -339,7 +339,7 @@ static void stm32_uartIRQDisable(int port)
 /* UART port instances */
 UART_PORT(1)
 UART_PORT(2)
-#if CPU_CM3_STM32F103RB
+#if CPU_CM3_STM32F103RB || CPU_CM3_STM32F103RE
 UART_PORT(3)
 #endif
 
@@ -369,7 +369,7 @@ static struct CM3Serial UARTDesc[SER_CNT] =
                .base = USART2_BASE,
                .irq = USART2_IRQHANDLER,
        },
-#if CPU_CM3_STM32F103RB
+#if CPU_CM3_STM32F103RB || CPU_CM3_STM32F103RE
        {
                .hw = {
                        .table = &USART3_VT,

diff --git a/bertos/cpu/cortex-m3/drv/ser_stm32.h b/bertos/cpu/cortex-m3/drv/ser_stm32.h
index 68fb4d468f023b2351a98d35c778bec08ee99d9e..885513b94acd6ef77076d53245c80261f8b2ac5b 100644 (file)
--- a/bertos/cpu/cortex-m3/drv/ser_stm32.h
+++ b/bertos/cpu/cortex-m3/drv/ser_stm32.h
@@ -49,7 +49,7 @@ enum
 {
        SER_UART1 = 0,
        SER_UART2,
-#if CPU_CM3_STM32F103RB
+#if CPU_CM3_STM32F103RB || CPU_CM3_STM32F103RE
        SER_UART3,
 #endif
        SER_CNT //< Number of serial ports

diff --git a/bertos/cpu/cortex-m3/io/stm32.h b/bertos/cpu/cortex-m3/io/stm32.h
index 2db09213c7b26eb810e063433f847db53dbd2816..49ee9b1ab183cbdc721f098187dbfc383f3385cc 100644 (file)
--- a/bertos/cpu/cortex-m3/io/stm32.h
+++ b/bertos/cpu/cortex-m3/io/stm32.h
@@ -56,7 +56,7 @@
        #define GPIO_USART1_RX_PIN      BV(10)
        #define GPIO_USART2_TX_PIN      BV(2)
        #define GPIO_USART2_RX_PIN      BV(3)
-#elif CPU_CM3_STM32F103RB
+#elif CPU_CM3_STM32F103RB || CPU_CM3_STM32F103RE
        #define GPIO_USART1_TX_PIN      BV(9)
        #define GPIO_USART1_RX_PIN      BV(10)
        #define GPIO_USART2_TX_PIN      BV(2)
@@ -70,7 +70,7 @@
 #if CPU_CM3_STM32F101C4
        #define GPIO_I2C1_SCL_PIN       BV(6)
        #define GPIO_I2C1_SDA_PIN       BV(7)
-#elif CPU_CM3_STM32F103RB
+#elif CPU_CM3_STM32F103RB || CPU_CM3_STM32F103RE
        #define GPIO_I2C1_SCL_PIN       BV(6)
        #define GPIO_I2C1_SDA_PIN       BV(7)
        #define GPIO_I2C2_SCL_PIN       BV(10)
@@ -79,7 +79,7 @@
        #error No i2c pins are defined for select cpu
 #endif
 
-#if CPU_CM3_STM32F101C4 || CPU_CM3_STM32F103RB
+#if CPU_CM3_STM32F101C4 || CPU_CM3_STM32F103RB || CPU_CM3_STM32F103RE
        #define FLASH_PAGE_SIZE   1024
 #else
        #error No embedded definition for select cpu

diff --git a/bertos/cpu/detect.h b/bertos/cpu/detect.h
index 41b190f5b769fdd443c6eb98d14b6ee77768e45a..43628acab6c616f1e746b9b55c907a24e898bad1 100644 (file)
--- a/bertos/cpu/detect.h
+++ b/bertos/cpu/detect.h
@@ -221,6 +221,15 @@
                #define CPU_CM3_STM32F103RB 0
        #endif
 
+       #if defined (__ARM_STM32F103RE__)
+               #define CPU_CM3_STM32       1
+               #define CPU_CM3_STM32F103RE 1
+               #define CPU_NAME            "STM32F103RE"
+       #else
+               #define CPU_CM3_STM32F103RE 0
+       #endif
+
+
        #if defined (__ARM_SAM3N4__)
                #define CPU_CM3_SAM3    1
                #define CPU_CM3_SAM3N   1
@@ -282,7 +291,7 @@
                #define CPU_CM3_STM32       0
                #define CPU_CM3_SAM3        0
        #elif defined (CPU_CM3_STM32)
-               #if CPU_CM3_STM32F101C4 + CPU_CM3_STM32F103RB + 0 != 1
+               #if CPU_CM3_STM32F101C4 + CPU_CM3_STM32F103RB + CPU_CM3_STM32F103RE + 0 != 1
                        #error STM32 Cortex-M3 CPU configuration error
                #endif
                #define CPU_CM3_LM3S        0
@@ -317,6 +326,7 @@
        #define CPU_CM3_STM32 0
        #define CPU_CM3_STM32F103RB 0
        #define CPU_CM3_STM32F101C4 0
+        #define CPU_CM3_STM32F103RE 0
 
        #define CPU_CM3_SAM3 0
        #define CPU_CM3_SAM3N 0